R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1005

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.2
Figure 20.2 shows the GDTA address space (physical addresses). The GDTA consists of a number
of function blocks; the address space is divided into function block units owned by the respective
blocks. However, not all actually existing addresses are on the space; addresses following those in
a function block are mapped as mirror spaces for the function block. For the details of addresses
actually existing in each function block, refer to section 20.3, Register Descriptions. Mirror spaces
also exist in buffer RAM.
Note: The space from H'FE40_3000 to H'FE40_3FFF, excluding the space for registers
P4 area address
H'FE40 0000
H'FE40 1000
H'FE40 2000
H'FE40 3000
H'FE41 0000
H'FE41 2000
H'FE42 0000
H'FE42 2000
H'FE43 0000
H'FE4F FFFF
DRCL_CTL, DWCL_CTL, DRMC_CTL, DWMC_CTL, DCP_CTL, and DID_CTL is a
reserved area, and write access is prohibited. If write access is made, correct operation
cannot be guaranteed.
GDTA Address Space
Figure 20.2 GDTA Address Space Map (Physical Addresses)
Area 7 address
H'1E4F FFFF
H'1E40 0000
H'1E40 1000
H'1E40 2000
H'1E40 3000
H'1E41 0000
H'1E41 2000
H'1E42 0000
H'1E42 2000
H'1E43 0000
Undefined (buffer RAM 0 mirror space: 8 Kbytes × 7)
Undefined (buffer RAM 1 mirror space: 8 Kbytes × 7)
Common registers for bus interface
20. Graphics Data Translation Accelerator (GDTA)
Buffer RAM 0 (8 Kbytes)
Buffer RAM 1 (8 Kbytes)
Rev.1.00 Jan. 10, 2008 Page 973 of 1658
Reserved
Reserved
MC
CL
REJ09B0261-0100

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