R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 954
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 954 of 1694
- Download datasheet (9Mb)
19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 922 of 1658
REJ09B0261-0100
Bit
4 to 0 FRQSEL 0
Bit Name
Initial
Value
R/W
R/W None
Internal
Update
Description
Frequency Select
To enable this bit, the DCKE bit in DEFR should be set to 1.
In the initial state, bit 4 is fixed at 0, and the frequency
division ratio is up to 16.
00000: Frequency division of the input dot clock (clock for
00001: Division by 2 of the input dot clock (clock for division)
00010: Division by 3 of the input dot clock (clock for division)
00011: Division by 4 of the input dot clock (clock for division)
00100: Division by 5 of the input dot clock (clock for division)
00101: Division by 6 of the input dot clock (clock for division)
00110: Division by 7 of the input dot clock (clock for division)
00111: Division by 8 of the input dot clock (clock for division)
01000: Division by 9 of the input dot clock (clock for division)
01001: Division by 10 of the input dot clock (clock for division)
01010: Division by 11 of the input dot clock (clock for division)
01011: Division by 12 of the input dot clock (clock for division)
01100: Division by 13 of the input dot clock (clock for division)
01101: Division by 14 of the input dot clock (clock for division)
01110: Division by 15 of the input dot clock (clock for division)
01111: Division by 16 of the input dot clock (clock for division)
10000: Division by 17 of the input dot clock (clock for division)
10001: Division by 18 of the input dot clock (clock for division)
10010: Division by 19 of the input dot clock (clock for division)
10011: Division by 20 of the input dot clock (clock for division)
10100: Division by 21 of the input dot clock (clock for division)
10101: Division by 22 of the input dot clock (clock for division)
10110: Division by 23 of the input dot clock (clock for division)
10111: Division by 24 of the input dot clock (clock for division)
11000: Division by 25 of the input dot clock (clock for division)
11001: Division by 26 of the input dot clock (clock for division)
11010: Division by 27 of the input dot clock (clock for division)
11011: Division by 28 of the input dot clock (clock for division)
11100: Division by 29 of the input dot clock (clock for division)
11101: Division by 30 of the input dot clock (clock for division)
11110: Division by 31 of the input dot clock (clock for division)
11111: Division by 32 of the input dot clock (clock for division)
division) is not performed.
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