R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 638

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

13. PCI Controller (PCIC)
(9)
This register records the PCI command information when an error is detected.
The value of this register is undefined until an interrupt is detected. Regardless of the information
on mask registers, etc, the value is retained when an interrupt is detected.
Rev.1.00 Jan. 10, 2008 Page 606 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31
30 to 27 ⎯
26
25 to 4
3 to 0
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
PCI Error Command Information Register (PCICIR)
Bit:
Bit:
Bit Name
MTEM
RWTET
⎯
ECL
MTEM
31
15
—
R
R
R
R
x
0
30
—
14
—
R
R
R
R
0
0
Initial
Value
x
All 0
x
All 0
xxxx
29
—
13
—
R
R
R
R
0
0
28
12
—
—
R
R
R
R
0
0
27
11
—
—
R
R
R
R
0
0
R/W
SH: R
PCI: R
SH: R
PCI: R
SH: R
PCI: R
SH: R
PCI: R
SH: R
PCI: R
TET
RW
26
10
—
R
R
R
R
0
x
Description
Master Error
Indicates that an error occurred during a master read
or a master write transfer
0: No master error
1: Master error occurred
Reserved
These bits are always read as 0. The write value
should always be 0.
Target Error
Indicates that an error occurred during a target read
or a target write transfer.
0: No target error
1: Target error occurred
Reserved
These bits are always read as 0. The write value
should always be 0.
Command Log
These bits retain PCI command information (the state
of the C/BE [3:0] line) when an error occurs.
25
—
—
R
R
R
R
0
9
0
24
—
—
R
R
R
R
0
8
0
23
—
—
R
R
R
R
0
7
0
22
—
—
R
R
R
R
0
6
0
21
—
—
R
R
R
R
0
5
0
20
—
—
R
R
R
R
0
4
0
19
—
R
R
R
R
0
3
x
18
—
R
R
R
R
0
2
x
ECL
17
—
R
R
R
R
0
1
x
16
—
R
R
R
R
0
0
x