R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1571
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1571 of 1694
- Download datasheet (9Mb)
Table 31.3 States of the Registers in the Individual Operating Modes (2)
Module
Name
DMAC
Name
DMA source address register 0
DMA destination address register 0
DMA transfer count register 0
DMA channel control register 0
DMA source address register 1
DMA destination address register 1
DMA transfer count register 1
DMA channel control register 1
DMA source address register 2
DMA destination address register 2
DMA transfer count register 2
DMA channel control register 2
DMA source address register 3
DMA destination address register 3
DMA transfer count register 3
DMA channel control register 3
DMA operation register 0
DMA source address register 4
DMA destination address register 4
DMA transfer count register 4
DMA channel control register 4
DMA source address register 5
DMA destination address register 5
DMA transfer count register 5
DMA channel control register 5
DMA source address register B0
DMA destination address register B0 DARB0
DMA transfer count register B0
Abbrev.
SAR0
DAR0
TCR0
CHCR0
SAR1
DAR1
TCR1
CHCR1
SAR2
DAR2
TCR2
CHCR2
SAR3
DAR3
TCR3
CHCR3
DMAOR0
SAR4
DAR4
TCR4
CHCR4
SAR5
DAR5
TCR5
CHCR5
SARB0
TCRB0
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
H'0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Rev.1.00 Jan. 10, 2008 Page 1539 of 1658
Manual Reset
by
WDT/Multiple
Exception
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
H'0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
H'4000 0000
Undefined
Undefined
Sleep/
Deep Sleep by
SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
REJ09B0261-0100
31. Register List
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
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