R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1384

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
27. NAND Flash Memory Controller (FLCTL)
27.3.6
FLDTCNTR is a 32-bit readable/writable register that specifies the number of bytes to be read or
written in command access mode.
Rev.1.00 Jan. 10, 2008 Page 1352 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 24
23 to 16
15 to 12
11 to 0
R/W:
R/W:
Bit:
Bit:
Data Counter Register (FLDTCNTR)
Bit Name
ECFLW[7:0] H'00
DTFLW[7:0] H'00
DTCNT[11:0] H'000
31
15
R
R
0
0
30
14
R
R
0
0
29
13
R
R
0
0
Initial
Value
AlI 0
ECFLW[7:0]
28
12
R
R
0
0
R/W
R
R
R/W
R/W
R
27
11
R
0
0
R/W
26
10
R
0
0
Description
FLECFIFO Access Count
Specify the number of longwords (4 bytes) in FLECFIFO
to be read or written. These bit can be used when the
CPU reads from or writes to FLECFIFO.
In reading from FLECFIFO, these bits specify the number
of longwords of the data that can be read from
FLECFIFO.
In writing to FLECFIFO, these bits specify the number of
longwords of empty area that can be written to
FLECFIFO.
FLDTFIFO Access Count
Specify the number of longwords (4 bytes) in FLDTFIFO
to be read or written. These bit values are used when the
CPU reads from or writes to FLDTFIFO.
In reading from FLDTFIFO, these bits specify the number
of longwords of the data that can be read from
FLDTFIFO.
In writing to FLDTFIFO, these bits specify the number of
longwords of empty area that can be written in
FLDTFIFO.
Reserved
These bits are always read as 0. The write value should
always be 0.
Data Count Specification
Specify the number of bytes of data to be read or written
in command access mode (Up to 2048 + 64 bytes can be
specified.)
R/W
25
R
0
9
0
R/W
24
R
0
8
0
R/W
23
R
0
7
0
DTCNT[11:0]
R/W
22
R
0
6
0
R/W
21
R
0
5
0
DTFLW[7:0]
R/W
20
R
0
4
0
R/W
19
R
0
3
0
R/W
18
R
0
2
0
R/W
17
R
0
1
0
R/W
16
R
0
0
0

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