R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 668

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

13. PCI Controller (PCIC)
(3)
Burst transfers are not supported in I/O transfers. Access within the size of 4-byte.
The PCI I/O address space is allocated from H'FD20 0000 to H'FE3F FFFF (2 Mbytes).
Address translation from SuperHyway bus to PCI local bus is shown below.
The lower 15 bits ([17:3]) of a SuperHyway bus address are sent without translation.
The middle bits ([20:18]) of a SuperHyway bus address are controlled by PCIIOBMR.
• PCIIOMR0 [20:18] B'111: PCI address [20:18] = SuperHyway bus address [20:18]
• PCIIOMR0 [20:18] B'000: PCI address [20:18] = PCIIOBR [20:18]
The upper eleven bits ([31:21]) of a SuperHyway bus address are replaced with bits 31 to 21 in
PCIIOBR.
(4)
All internal registers, that is, PCIECR, PCI configuration registers, and PCI local registers can be
accessed through the CPU. 4-byte, 2-byte, and 1-byte transmission are supported.
(5)
The PCIC in this LSI supports both the big endian and little endian formats. Since the PCI bus
supports little endian, the PCIC supports both byte swapping and non-byte swapping.
The endian format setting is specified by the TBS bit in PCICR.
Rev.1.00 Jan. 10, 2008 Page 636 of 1658
REJ09B0261-0100
Accessing PCI I/O Space
Accessing Internal Registers of This LSI
Endian
SHwy bus address
Figure 13.6 Access from SuperHyway Bus to PCI I/O Space (PCI Bus)
PCIIOBMR
31 21
31 21
20
20
18 17
18 17
0
0
PCI address
mask
PCIIOBR
31 21
31 21
20
20
18 17
18 17
0
0