R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 492

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

12. DDR2-SDRAM Interface (DBSC2)
12.2
Table 12.1 shows the pin configuration of the DBSC2.
Table 12.1 Pin Configuration of the DBSC2
Rev.1.00 Jan. 10, 2008 Page 460 of 1658
REJ09B0261-0100
Pin Name
MCK0
MCK0
MCK1
MCK1
MCKE
MCS
MWE
MRAS
MCAS
MA14 to MA0
MBA2, MBA1,
MBA0
MDQ31 to
MDQ0
MDQS3 to
MDQS0
MDQS3 to
MDQS0
MDM3 to
MDM0
MODT
MBKPRST
MVREF
Input/Output Pins
ODT enable
Reference voltage input
Function
DDR2-SDRAM clock 0
DDR2-SDRAM clock 0
DDR2-SDRAM clock 1
DDR2-SDRAM clock 1
Clock enable
Chip select
Write enable
Row address strobe
Column address strobe
Addresses
Bank active
Data
I/O data strobe
I/O data strobe
Data mask
Power backup reset
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
I/O
I/O
I/O
Output
Output
Input
Input
Description
Clock output for the DDR2-SDRAM
Clock output for the DDR2-SDRAM or
MCK0 inverted clock output
Clock output for the DDR2-SDRAM
Clock output for the DDR2-SDRAM or
MCK1 inverted clock output
CKE output signal
Chip select output signal
Write enable output signal
Row address strobe output signal
Column address strobe output signal
Address output signals
Bank address output signal
Data I/O signals
Data strobe I/O signals
Data strobe I/O signals or MDQS3 to
MDQS0 inverted signals
Data mask output signals
ODT enable output signal to the SDRAM
Used in power backup mode.
When this pin is brought low level, the
MCKE pin is also pulled low.
Input reference voltage