R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1228
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ANBGV
Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ANBGV
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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24. Multimedia Card Interface (MMCIF)
24.3.10 Mode Register (MODER)
MODER is an 8-bit readable/writable register that specifies the MMCIF operating mode. The
following sequence should be repeated when the MMCIF uses the multimedia card: Send a
command, wait for the end of the command sequence and the end of the data busy state, and send
a next command.
The series of operations from command sending, command response reception, data
transmission/reception, and data response reception is called as the command sequence. The
command sequence starts from sending a command by setting the CMDSTART bit in CMDSTRT
to 1, and ends when all necessary data transmission/reception and response reception have been
completed. The multimedia card supports the data busy state such that only the specific command
is accepted to write/erase data to/from the flash memory in the card during command sequence
execution and after command sequence execution has ended. The data busy state is indicated by a
low level output from the card side to the MMCDAT pin.
Rev.1.00 Jan. 10, 2008 Page 1196 of 1658
REJ09B0261-0100
Bit
7 to 1
0
Bit Name
—
MODE
Initial value:
Initial
Value
All 0
0
R/W:
Bit:
⎯
R
7
0
R/W
R
R/W
⎯
6
0
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operating Mode
Specifies the MMCIF operating mode.
0: Operates in MMC mode
1: Setting prohibited
⎯
R
5
0
⎯
4
0
R
⎯
R
0
3
⎯
2
0
R
⎯
R
1
0
MODE
R/W
0
0
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