R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 810

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

16. Watchdog Timer and Reset (WDT)
(2)
The timing of indicating the reset state or normal operation on the STATUS[1:0] pins is
synchronous with the peripheral clock (Pck), and is therefore asynchronous with the clocks input
from the EXTAL pin and the CLKOUT pin.
If the bus clock frequency has been changed from the initial value, the oscillation settling time of
PLL2 circuit and the time until the LSI resumes operation (WDT count up) are also required. In
this case, the WDT reset holding time is two peripheral clock (Pck) cycles or more.
Rev.1.00 Jan. 10, 2008 Page 778 of 1658
REJ09B0261-0100
EXTAL
input
CLKOUT
output
CLKOUTENB
output
WDT overflow
signal
STATUS[1:0]
output
Power-On Reset Caused by Watchdog Timer Overflow in Sleep Mode
Figure 16.7 STATUS Output by Power-On Reset Caused by WDT Overflow
WDT reset setup time
HL (sleep)
PLL oscillation
settling time
in Sleep Mode
HH (reset)
WDT count up
WDT reset
holding time
LL (normal)