UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 156

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
(4) Port input mode register 6 (PIM6)
(5) Port output mode register 6 (POM6)
156
This register sets the input buffer of P60 or P61 in 1-bit units. When using an input compliant with the SMBus
Specifications in I
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
This register sets the output mode of P60 to P63 in 1-bit units. During I
SDAA0/P61 to N-ch open drain output (V
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Address: FF3EH
Address: FF2AH
Symbol
Symbol
POM6
PIM6
Note
78K0/KC2-L only
POM6n
PIM6n
2
7
0
0
1
7
0
0
1
C communication, select the SMBus input buffer.
After reset: 00H
After reset: 00H
Figure 4-43. Format of Port Output Mode Register 6 (POM6)
Figure 4-42. Format of Port Input Mode Register 6 (PIM6)
Normal input (Schmitt) buffer
SMBus input buffer
Normal output (CMOS output) mode
N-ch open drain output (V
6
0
6
0
R/W
R/W
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 4 PORT FUNCTIONS
DD
5
0
5
0
tolerance) mode.
P6n pin output mode selection (n = 0 to 3)
DD
P6n pin input buffer selection (n = 0, 1)
tolerance) mode
4
0
4
0
POM63
3
0
3
Note
2
POM62
C communication, set SCLA0/P60 and
2
0
2
Note
POM61
PIM61
1
1
POM60
PIM60
0
0

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