UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 300

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.4.3 Square-wave output operation
compare register 5n (CR5n).
(TOE5n) of 8-bit timer mode control register 5n (TMC5n) to 1. This enables a square wave with any selected
frequency to be output (duty = 50%).
300
A square wave with any selected frequency is output at intervals determined by the value preset to 8-bit timer
The TO5n pin output status is inverted at intervals determined by the count value preset to CR5n by setting bit 0
Remark Square-wave output is operable only in the 78K0/KB2-L and 78K0/KC2-L.
<1> Set each register.
<2> After TCE5n = 1 is set, the count operation starts.
<3> The timer output F/F is inverted by a match of TM5n and CR5n. After INTTM5n is generated, TM5n is
<4> After these settings, the timer output F/F is inverted at the same interval and a square wave is output from
Note 8-bit timer/event counter 50: P17, PM17
Caution Do not write other values to CR5n during operation.
Remarks 1. For how to enable the INTTM5n signal interrupt, refer to CHAPTER 17 INTERRUPT FUNCTIONS.
Setting
cleared to 00H.
TO5n.
The frequency is as follows.
8-bit timer/event counter 51: P33, PM33
Frequency = 1/2t (N + 1)
(N: 00H to FFH)
Clear the port output latch (P17 or P33)
TCL5n: Select the count clock.
CR5n:
TMC5n: Stop the count operation, select the mode in which clear & start occurs on a match of TM5n and
2. 78K0/KB2-L, 78K0/KC2-L: n = 0, 1
Compare value
CR5n.
Timer output enabled
(TMC5n = 00001011B or 00000111B)
LVS5n
0
1
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
LVR5n
1
0
Timer output F/F clear (0) (default value of TO5n output: low level)
Timer output F/F set (1) (default value of TO5n output: high level)
Preliminary User’s Manual U19111EJ2V1UD
Note
and port mode register (PM17 or PM33)
Timer Output F/F Status Setting
Note
to 0.