UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 390

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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12.4.3 A/D converter operation mode
specification register (ADS) and A/D conversion is executed.
(1) A/D conversion operation
390
A/D conversion
One channel of analog input is selected from ANI0 to ANI10 and PGA output by the analog input channel
Remark A/D converter analog input pins differ depending on products.
By setting bit 7 (ADCS) of the A/D converter mode register 0 (ADM0) to 1, the A/D conversion operation of the
voltage, which is applied to the analog input pin specified by the analog input channel specification register
(ADS), is started.
When A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion result
register (ADCR, ADCRL, ADCRH), and an interrupt request signal (INTAD) is generated.
conversion has been completed, the next A/D conversion operation is immediately started.
If ADS is rewritten during A/D conversion, the A/D conversion operation under execution is stopped and restarted
from the beginning.
If 0 is written to ADCS during A/D conversion, A/D conversion is immediately stopped.
conversion result immediately before is retained.
Remarks 1. n = 0 to 10 (it depends on products)
ADCRH
ADCRL,
ADCR,
INTAD
2. m = 0 to 10 (it depends on products)
78K0/KY2-L:
78K0/KA2-L:
78K0/KB2-L:
78K0/KC2-L:
Rewriting ADM0
ADCS = 1
ANIn
ANI0 to ANI3
ANI0 to ANI5
ANI0 to ANI3, ANI8 to ANI10
ANI0 to ANI10
Figure 12-15. A/D Conversion Operation
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 12 A/D CONVERTER
ANIn
ANIn
Conversion is stopped
Conversion result immediately
before is retained
Rewriting ADS
ANIn
ANIn
ANIm
ANIm
ADCS = 0
ANIm
At this time, the
Stopped
Conversion result
immediately before
is retained
When one A/D