UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 714

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

31.2 Peripheral Hardware That Generates Wait
clocks.
Caution When the peripheral hardware clock (f
Remark The clock is the CPU clock (f
714
Serial interface
UART6
Serial interface
IICA
A/D converter
Table 31-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
Peripheral
Hardware
using an access method in which a wait request is issued.
Table 31-1. Registers That Generate Wait and Number of CPU Wait Clocks
ASIS6
IICAS0
ADM0
ADS
ADPC0, ADPC1
ADCR, ADCRH
The above number of clocks is when the same source clock is selected for f
clocks can be calculated by the following expression and under the following conditions.
<Calculating number of wait clocks>
<Conditions for maximum/minimum number of wait clocks>
Number of wait clocks =
Maximum number of times: Maximum speed of CPU (f
Minimum number of times: Minimum speed of CPU (f
* Fraction is truncated if the number of wait clocks
f
f
f
f
AD
CPU
PRS
XP
:
:
: CPU clock frequency
: Peripheral hardware clock frequency
Register
A/D conversion clock frequency (f
Main system clock frequency
CPU
CHAPTER 31 CAUTIONS FOR WAIT
Preliminary User’s Manual U19111EJ2V1UD
).
2 f
f
AD
Read
Read
Write
Write
Write
Read
CPU
+ 1
PRS
Access
) is stopped, do not access the registers listed above
PRS
to f
PRS
/12)
SUB
0.5 and rounded up if the number of wait clocks > 0.5.
XP
), highest speed of A/D conversion clock (f
), lowest speed of A/D conversion clock (f
1 clock (fixed)
1 clock (fixed)
1 to 5 clocks (when f
1 to 7 clocks (when f
1 to 9 clocks (when f
2 to 13 clocks (when f
2 to 17 clocks (when f
2 to 25 clocks (when f
Number of Wait Clocks
CPU
and f
AD
AD
AD
AD
AD
AD
= f
= f
= f
= f
= f
= f
PRS
PRS
PRS
PRS
PRS
PRS
PRS
. The number of wait
/2 is selected)
/3 is selected)
/4 is selected)
/6 is selected)
/8 is selected)
/12 is selected)
PRS
PRS
/12)
)