UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 490

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

490
(1) Master operation in single-master system
Note Release (SCLA0 and SDAA0 pins = high level) the I
Remark
product that is communicating. If EEPROM is outputting a low level to the SDAA0 pin, for example, set the
SCLA0 pin in the output port mode, and output a clock pulse from the output port until the SDAA0 pin is
constantly at high level.
Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
No
No
Figure 15-30. Master Operation in Single-Master System
ACKE0 = WTIM0 = SPIE0 = 1
Setting STCEN, IICRSV = 0
IICACTL0
IICACTL0
IICWL, IICWH
Initializing I
interrupt occurs?
interrupt occurs?
interrupt occurs?
End of transfer?
IICAF0
SVA0
STCEN = 1?
ACKD0 = 1?
ACKD0 = 1?
Writing IICA
Writing IICA
Setting port
Setting port
TRC0 = 1?
IICE0 = 1
INTIICA0
STT0 = 1
INTIICA0
INTIICA0
SPT0 = 1
Restart?
START
0XX111XXB
1XX111XXB
No
Yes
2
Yes
Yes
Yes
Yes
Yes
Yes
Yes
C bus
XXH
0XH
CHAPTER 15 SERIAL INTERFACE IICA
XXH
Note
Preliminary User’s Manual U19111EJ2V1UD
Waits for detection of the stop condition.
Yes
No
No
No
No
No
No
Prepares for starting communication
(generates a stop condition).
Starts transmission.
Waits for data transmission.
Prepares for starting communication
(generates a start condition).
Starts communication
(specifies an address and transfer
direction).
Waits for detection of acknowledge.
Setting of the port used alternatively as the pin to be used.
First, set the port to input mode and the output latch to 0 (see 15.3 (9) Port mode register 6 (PM6)).
Sets a transfer clock.
Sets a local address.
Sets a start condition.
Set the port from input mode to output mode and enable the output of the I
(see 15.3 (9) Port mode register 6 (PM6)).
SPT0 = 1
END
2
C bus in conformance with the specifications of the
WTIM0 = WREL0 = 1
interrupt occurs?
interrupt occurs?
End of transfer?
Reading IICA
WREL0 = 1
ACKE0 = 1
WTIM0 = 0
ACKE0 = 0
INTIICA0
INTIICA0
Yes
Yes
Yes
No
No
No
Waits for data
reception.
Waits for detection
of acknowledge.
Starts reception.
2
C bus