UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 239

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.4.4 Operation in clear & start mode entered by TI000 pin valid edge input
start mode entered by the TI000 pin valid edge input) and the count clock (set by PRM00) is supplied to the
timer/event counter, TM00 starts counting up. When the valid edge of the TI000 pin is detected during the counting
operation, TM00 is cleared to 0000H and starts counting up again. If the valid edge of the TI000 pin is not detected,
TM00 overflows and continues counting.
the start of the operation.
(1) Operation in clear & start mode entered by TI000 pin valid edge input
When bits 3 and 2 (TMC003 and TMC002) of 16-bit timer mode control register 00 (TMC00) are set to 10 (clear &
The valid edge of the TI000 pin is a cause to clear TM00. Starting the counter is not controlled immediately after
CR000 and CR010 are used as compare registers and capture registers.
(a) When CR000 and CR010 are used as compare registers
(b) When CR000 and CR010 are used as capture registers
Caution Do not set the count clock as the valid edge of the TI000 pin (PRM001 and PRM000 = 11). When
Remarks 1. For the setting of the I/O pins, refer to 6.3 (5) Port mode register 0 (PM0).
(CR000: compare register, CR010: compare register)
Signals INTTM000 and INTTM010 are generated when the value of TM00 matches the value of CR000 and
CR010.
The count value of TM00 is captured to CR000 and the INTTM000 signal is generated when the valid edge is
input to the TI010 pin (or when the phase reverse to that of the valid edge is input to the TI000 pin).
When the valid edge is input to the TI000 pin, the count value of TM00 is captured to CR010 and the
INTTM010 signal is generated. As soon as the count value has been captured, the counter is cleared to
0000H.
Count clock
TI000 pin
Figure 6-22. Block Diagram of Clear & Start Mode Entered by TI000 Pin Valid Edge Input
2. For how to enable the INTTM000 signal interrupt, refer to CHAPTER 17 INTERRUPT FUNCTIONS.
PRM001 and PRM000 = 11, TM00 is cleared.
TMC003, TMC002
Operable bits
(CR000: Compare Register, CR010: Compare Register)
detection
Edge
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Preliminary User’s Manual U19111EJ2V1UD
Compare register
Timer counter
Match signal
(CR010)
(TM00)
Compare register
Clear
(CR000)
Match signal
controller
Output
TO00 output
Interrupt signal
(INTTM000)
Interrupt signal
(INTTM010)
TO00 pin
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