UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 696

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Caution The pins mounted depend on the product. Refer to Caution 3 at the beginning of this chapter.
Notes 1.
696
SCLA0 clock frequency
Setup time of start condition and
stop condition
Hold time
Hold time when SCLA0 = “L”
Hold time when SCLA0 = “H”
Data setup time (reception)
Data hold time (transmission)
Setup time of stop condition
Bus
condition and start condition
Rise time of SDAA0 and SCLA0
signals
Fall time of SDAA0 and SCLA0
signals
Total load capacitance value of
each communication line (SCLA0,
SDAA0)
(b) IICA
free
2.
3.
4.
5.
6.
7.
Note 1
Parameter
The first clock pulse is generated after this period when the start/restart condition is detected.
The maximum value (MAX.) of t
(acknowledge) timing.
f
When f
When f
When f
When f
time
W
indicates the IICA transfer clock selected by the IICCWL and IICCWH registers.
between
W
W
W
W
< 4.4 MHz is selected
< 5 MHz is selected
4.4 MHz is selected
5 MHz is selected
CHAPTER 28 ELECTRICAL SPECIFICATIONS (TARGET VALUES)
Note 2
stop
f
t
t
t
t
t
t
t
t
t
t
C
Symbol
SCL
SU: STA
HD: STA
LOW
HIGH
SU: DAT
HD: DAT
SU: STO
BUF
R
F
b
Preliminary User’s Manual U19111EJ2V1UD
f
selected
f
selected
W
W
HD:DAT
= f
= f
XH
IH
/2
/2
Note 3
Note 3
N
N
is during normal transfer and a wait state is inserted in the ACK
Conditions
DFC0 = 0
DFC0 = 1
DFC0 = 0
DFC0 = 1
Standard Mode
MIN.
250
4.7
4.0
4.7
4.0
4.0
4.7
0
0
0
MAX.
1000
3.45
3.45
100
300
400
High-Speed Mode
0.1C
0.1C
MIN.
2.0+
2.0+
100
0.6
0.6
1.3
0.6
0.6
1.3
0
0
0
0
0
b
b
1.125
0.9
1.0
0.9
MAX.
1.184
1.05
400
300
300
400
Note 4
Note 5
Note 6
Note 7
Unit
kHz
pF
ns
ns
ns
s
s
s
s
s
s
s
s
s
s

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