UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 452

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.2 Configuration of Serial Interface IICA
452
Serial interface IICA includes the following hardware.
(1) IICA shift register (IICA)
(2) Slave address register 0 (SVA0)
IICA is used to convert 8-bit serial data to 8-bit parallel data and vice versa in synchronization with the serial
clock. IICA can be used for both transmission and reception.
The actual transmit and receive operations can be controlled by writing and reading operations to IICA.
Cancel the wait state and start data transfer by writing data to IICA during the wait period.
IICA can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears IICA to 00H.
Cautions 1. Do not write data to IICA during data transfer.
This register stores local addresses when in slave mode.
SVA0 can be set by an 8-bit memory manipulation instruction.
However, rewriting to this register is prohibited while STD0 = 1 (while the start condition is detected).
Reset signal generation clears SVA0 to 00H.
Address: FFA5H
Symbol
IICA
2. Write or read IICA only during the wait period. Accessing IICA in a communication state
Registers
Control registers
other than during the wait period is prohibited. When the device serves as the master,
however, IICA can be written only once after the communication trigger bit (STT0) is set to
1.
Item
7
Table 15-1. Configuration of Serial Interface IICA
Figure 15-3. Format of IICA Shift Register (IICA)
After reset: 00H
CHAPTER 15 SERIAL INTERFACE IICA
6
Preliminary User’s Manual U19111EJ2V1UD
IICA shift register (IICA)
Slave address register 0 (SVA0)
IICA control register 0 (IICACTL0)
IICA status register 0 (IICAS0)
IICA flag register 0 (IICAF0)
IICA control register 1 (IICACTL1)
IICA low-level width setting register (IICWL)
IICA high-level width setting register (IICWH)
Port input mode register 6 (PIM6)
Port output mode register 6 (POM6)
Port mode register 6 (PM6)
Port register 6 (P6)
5
R/W
4
Configuration
3
2
1
0