UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 527

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
<R>
(1) Transmit buffer register 1n (SOTB1n)
SI11/SDAA0/P61
SCK11/SCLA0/P60
Notes 1.
This register sets the transmit data.
Transmission/reception is started by writing data to SOTB1n when bit 7 (CSIE1n) and bit 6 (TRMD1n) of serial
operation mode register 1n (CSIM1n) is 1.
The data written to SOTB1n is converted from parallel data into serial data by serial I/O shift register 1n, and
output to the serial output pin (SO1n).
SOTB1n can be written or read by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Cautions 1. Do not access SOTB1n when CSOT1n = 1 (during serial communication).
Remarks 1. 78K0/KB2-L: n = 0
2.
SSI11
Note 1
2. The SSI11 pin is available only in 48-pin products of 78K0/KC2-L.
By MUXSEL register setting, SCK11, SI11, and SO11 can be assigned as P40, P41, and P120,
respectively.
48-pin products of 78K0/KC2-L only
2. In the slave mode, transmission/reception is started when data is written to SOTB11 with a
Note 1
Note 2
78K0/KC2-L: n = 0, 1
low level input to the SSI11 pin. For details on the transmission/reception operation, refer
to 16.4.2 (2) Communication operation.
f
f
f
f
f
f
Figure 16-2. Block Diagram of Serial Interface CSI11 (78K0/KC2-L)
PRS
PRS
PRS
PRS
PRS
PRS
f
PRS
/2
/2
/2
/2
/2
/2
/2
2
3
4
5
6
7
Transmit data
controller
PM60
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
Serial I/O shift
register 11 (SIO11)
8
Output latch
Preliminary User’s Manual U19111EJ2V1UD
Internal bus
(P60)
Output latch
Transmit buffer
register 11 (SOTB11)
Clock start/stop controller &
clock phase controller
Transmit controller
8
selector
Output
output
SO11
Output latch
(P62)
INTCSI11
PM62
SSI11
SO11/P62
Note 2
527
Note 1

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