UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 496

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

496
An example of the processing procedure of the slave with the INTIICA0 interrupt is explained below
(processing is performed assuming that no extension code is used). The INTIICA0 interrupt checks the status,
and the following operations are performed.
<1> Communication is stopped if the stop condition is issued.
<2> If the start condition is issued, the address is checked and communication is completed if the address
<3> For data transmit/receive, only the ready flag is set. Processing returns from the interrupt with the I
Remark
Interrupt servicing completed
INTIICA0 generated
does not match.
processing returns from the interrupt (the ready flag is cleared).
remaining in the wait state.
Set ready flag
SPD0 = 1?
STD0 = 1?
<1> to <3> above correspond to <1> to <3> in Figure 15-33 Slave Operation Flowchart (2).
No
No
<3>
If the address matches, the communication mode is set, wait is cancelled, and
Figure 15-33. Slave Operation Flowchart (2)
Yes
Yes
CHAPTER 15 SERIAL INTERFACE IICA
Preliminary User’s Manual U19111EJ2V1UD
<1>
<2>
Set communication mode flag
Communication direction flag
Clear ready flag
COI0 = 1?
TRC0
Yes
No
Clear communication direction
communication mode flag
flag, ready flag, and
2
C bus