UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 473

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.5.6 Wait
receive data (i.e., is in a wait state).
canceled for both the master and slave devices, the next data transfer can begin.
The wait is used to notify the communication partner that a device (master or slave) is preparing to transmit or
Setting the SCLA0 pin to low level notifies the communication partner of the wait state. When wait state has been
(1) When master device has a nine-clock wait and slave device has an eight-clock wait
(master transmits, slave receives, and ACKE0 = 1)
Transfer lines
Master
Slave
ACKE0
SDAA0
SCLA0
SCLA0
SCLA0
IICA
IICA
H
D2
CHAPTER 15 SERIAL INTERFACE IICA
6
6
Master returns to high
impedance but slave
is in wait state (low level).
Preliminary User’s Manual U19111EJ2V1UD
Wait after output
of eighth clock
D1
7
7
Figure 15-21. Wait (1/2)
D0
8
8
Wait from slave
9
ACK
Wait after output
of ninth clock
9
FFH is written to IICA or WREL0 is set to 1
Wait from master
IICA data write (cancel wait)
D7
1
1
D6
2
2
D5
3
3
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