UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 635

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.4.2 When used as interrupt
(1) When detecting level of supply voltage (V
(a) When LVI default start function stopped is set (LVISTART = 0)
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage
<3> Set the LVI detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level
<4> Clear bit 1 (LVIMD) of LVIM to 0 (generates interrupt signal when the level is detected)
<5> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<6> Use software to wait for an operation stabilization time (10 s (MAX.)).
<7> Confirm that “supply voltage (V
<8> Clear the interrupt request flag of LVI (LVIIF) to 0.
<9> Release the interrupt mask flag of LVI (LVIMK).
<10> Execute the EI instruction (when vector interrupts are used).
Figure 22-8 shows the timing of the interrupt signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <9> above.
When using 8-bit memory manipulation instruction:
When using 1-bit memory manipulation instruction:
When starting operation
When stopping operation
Either of the following procedures must be executed.
Write 00H to LVIM.
Clear LVION to 0.
(V
selection register (LVIS).
(default value).
or “supply voltage (V
(LVIF) of LVIM.
DD
)) (default value).
DD
) < LVI detection voltage (V
CHAPTER 22 LOW-VOLTAGE DETECTOR
Preliminary User’s Manual U19111EJ2V1UD
DD
)
DD
LVI detection voltage (V
)
LVI
)” when detecting the rising edge of V
LVI
)” when detecting the falling edge of V
DD
, at bit 0
635
DD
,