UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 222

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Capture/compare control register 00 (CRC00)
222
Address: FFBAH
Note The TI000 pin valid edge is set by bits 5 and 4 (ES010, ES000) of prescaler mode register 00 (PRM00).
Symbol
TMC00
CRC00 is the register that controls the operation of CR000 and CR010.
Changing the value of CRC00 is prohibited during operation (when TMC003 and TMC002 = other than 00).
CRC00 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears CRC00 to 00H.
OVF00 is set to 1 when the value of TM00 changes from FFFFH to 0000H in all the operation modes (free-running
timer mode, clear & start mode entered by TI000 pin valid edge input, and clear & start mode entered upon a match
between TM00 and CR000).
It can also be set to 1 by writing 1 to OVF00.
Clear (0)
TMC003
TMC001
OVF00
Set (1)
0
0
1
1
0
1
7
0
After reset: 00H
Figure 6-5. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
Clears OVF00 to 0 or TMC003 and TMC002 = 00
Overflow occurs.
Match between TM00 and CR000 or match between TM00 and CR010
Match between TM00 and CR000 or match between TM00 and CR010
Trigger input of TI000 pin valid edge
TMC002
0
1
0
1
6
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
R/W
Disables 16-bit timer/event counter 00 operation. Stops supplying operating clock.
Clears 16-bit timer counter 00 (TM00).
Free-running timer mode
Clear & start mode entered by TI000 pin valid edge input
Clear & start mode entered upon a match between TM00 and CR000
Preliminary User’s Manual U19111EJ2V1UD
5
0
Condition to reverse timer output (TO00)
Operation enable of 16-bit timer/event counter 00
4
0
TM00 overflow flag
TMC003
3
TMC002
2
Note
TMC001
1
OVF00
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