UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 30

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
1.4.3 78K0/KB2-L
30
AMP0OUT
INTP1/P30 to INTP4/P33,
INTP5/P16, INTP10/P61,
Note
Cautions 1. Connect the IC (Internally Connected) pin directly to V
ANI8/P10 to ANI10/P12
ANI0/P20 to ANI3/P23,
RxD6/P14<LINSEL>
RxD6/P14<LINSEL>
Note
AMP1OUT
TO00/TI010/P01
AMP0+
AMP1+
TI50/TO50/P17
TI51/TO51/P33
/PGAIN
AMP0-
AMP1-
INTP11/P60
PD78F0576, 78F0577, 78F0578 (products with operational amplifier) only
INTP0/P120
SDAA0/P61
SCLA0/P60
SCK10/P10
TOH1/P16
TI000/P00
TOH0/P15
RxD6/P14
SO10/P12
TxD6/P13
2. Connect the REGC pin to V
3. ANI0/P20/AMP0-, ANI1/P21/AMP0OUT/PGAIN, ANI2/P22/AMP0+, and ANI3/P23 are set in the
4. RESET/P125 immediately after release of reset is set in the external reset input.
SI10/P11
Note
Note
Note
Note
Note
Note
AV
/P22
/P12
AV
/P20
/P10
/P21
/P11
analog input mode, P10/ANI8/AMP1-/SCK10, P11/ANI9/AMP1OUT/SI10, and
P12/ANI10/AMP1+/SO10 are set in the digital input mode after release of reset.
REF
SS
7
7
WATCHDOG TIMER
16-bit TIMER/
EVENT COUNTER 00
SERIAL
INTERFACE CSI10
8-bit TIMER/
EVENT COUNTER 50
8-bit TIMER/
EVENT COUNTER 51
A/D CONVERTER
SERIAL
INTERFACE UART6
SERIAL
INTERFACE IICA
AMPLIFIER 0
AMPLIFIER 1
OPERATIONAL
OPERATIONAL
8-bit TIMER H0
8-bit TIMER H1
INTERRUPT
OSCILLATOR
LOW-SPEED
CONTROL
INTERNAL
LINSEL
Note
Note
Preliminary User’s Manual U19111EJ2V1UD
SS
CHAPTER 1 OUTLINE
via a capacitor (0.47 to 1 F: target).
CORE
V
78K/0
CPU
DD
HIGH-SPEED
INTERNAL
RAM
V
SS
MEMORY
FLASH
IC
POWER ON CLEAR/
RESET CONTROL
SS
ON-CHIP DEBUG
VOLTAGE
REGULATOR
LOW VOLTAGE
OSCILLATOR
HIGH-SPEED
.
INTERRUPT
CONTROL
INDICATOR
CONTROL
INTERNAL
PORT 12
SYSTEM
PORT 0
PORT 1
PORT 2
PORT 3
PORT 6
2
8
2
4
4
3
7
CONTROL
POC/LVI
P120
P121, P122, P125
RESET/P125
X2/EXCLK/P122
REGC
P00, P01
P10 to P17
P20 to P23
P30 to P33
TOOLC0/X1, TOOLC1/P31
TOOLD0/X2, TOOLD1/P32
X1/P121
P60, P61
INTP0/P120
RxD6/P14<LINSEL>
INTP1/P30 to INTP4/P33,
INTP5/P16, INTP10/P61,
INTP11/P60
EXLVI/P120