PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 133

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

8
9
10
GPIO [3:1] of PI7C9X110 are defined for hot-plug usage if MSK_IN=1 during Reset. Please see configuration
register definition (offset 78h – 7Bh).
GPIO [3:0] are also defined the address bits of SMBUS device ID if SM Bus is selected (TM1=1). The address-
strapping table of SMBUS with GPIO [3:0] pins is defined in the following table:
Table 8-1 SM Bus Device ID Strapping
GPIO [3:0] pins can be further defined to serve other functions in the next generation Device.
Four GPI [3:0] and four GPO [3:0] have been added to PI7C9X110 when external arbiter is selected (CFN_L=1). If
external arbiter is selected, REQ_L [5:2] and GNT [5:2] will become the GPI [3:0] and GPO [3:0] respectively.
PCI Express interface:
PI7C9X110 requires 100MHz differential clock inputs through REFCLKP and REFCLKN Pins.
PCI-X interface:
PI7C9X110 requires PCI-X clock (up to 133MHz) to be connected to the CLKIN. PI7C9X110 uses the CLKIN and
generates nine clock outputs, CLKOUT [8:0]. Also, PI7C9X110 requires one of the CLKOUT [8:0] (preferably
CLKOUT [8]) to be connected to FBCLKIN for the PCI-X interface logic of PI7C9X110. The actual number of
masters supported will vary depending on the loading of the PCI-X bus. Typically, PI7C9X110 can support up to
one 133MHz PCI-X slot or two 66MHz PCI-X slots.
PCI interface:
PI7C9X110 requires PCI clock (up to 66MHz and at least 10MHz) to be connected to the CLKIN. PI7C9X110 uses
the CLKIN and generates nine clock outputs, CLKOUT [8:0]. Also, PI7C9X110 requires one of the CLKOUT
[8:0] (preferably CLKOUT [8]) to be connected to FBCLKIN for the PCI interface logic of PI7C9X110. The actual
number of masters supported will vary depending on the loading of the PCI bus. Typically, PI7C9X110 can support
up to four 66MHz PCI slots or eight 33MHz PCI slots.
The PI7C9X110 PCI Clock Outputs, CLKOUT [8:0], can be enabled or disabled through the configuration register.
PI7C9X110 supports interrupt message packets on PCIe side. PI7C9X110 supports PCI interrupt (INTA, B, C, D)
pins or MSI (Message Signaled Interrupts) on PCI side. PCI interrupts and MSI are mutually exclusive. In order
words, if MSI is enabled, PCI interrupts will be disabled. PI7C9X110 support 64-bit addressing MSI.
Pericom Semiconductor
GPIO PINS AND SM BUS ADDRESS
CLOCK SCHEME
INTERRUPTS
SM Bus Address Bit
Address bit [7]
Address bit [6]
Address bit [5]
Address bit [4]
Address bit [3]
Address bit [2]
Address bit [1]
Page 133 of 145
SM Bus device ID
= 1
= 1
= 0
= GPIO [3]
= GPIO [2]
= GPIO [1]
= GPIO [0]
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110