PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 91

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

7.5.38 UPSTREAM MEMORY 2 BASE ADDRESS REGISTER – OFFSET 5Ch
7.5.39 UPSTREAM MEMORY 3 BASE ADDRESS REGISTER – OFFSET 60h
Pericom Semiconductor
BIT
31:6
BIT
0
2:1
3
13:4
31:14
BIT
0
2:1
3
11:4
FUNCTION
Base Address
FUNCTION
Space Indicator
Address Type
Prefetchable control
Reserved
Base Address
FUNCTION
Space Indicator
Address Type
Prefetchable control
Reserved
RW/RO
RW/RO
TYPE
TYPE
TYPE
RO
RO
RO
RO
RO
RO
RO
RO
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DESCRIPTION
The size and type of this Base Address Register are defined from Upstream
IO or Memory 1 Setup Register (Offset ECh), which can be initialized by
EEPROM (I2C) or SM Bus or Local Processor. Writing a zero to bit [31] of
the setup register to disable this register. The range of this register is from
4KB to 2GB for memory space or from 64B to 256B for IO space.
PI7X9X110 uses upstream IO or Memory 1 Translated Base Register (Offset
E8h) to formulate direct address translation. If a bit in the setup register is
set to one, then the correspondent bit of this register will be changed to RW.
Reset to 00000h
DESCRIPTION
0: Memory space
1: IO space
Reset to 0
00: 32-bit address decode range
01, 10 and 11: reserved
Reset to 00
0: Memory space is non-prefetchable
1: Memory space is prefetchable
Reset to 0
Reset to 0
This Base Address register defines the address range for upstream memory
transactions. PI7C9X110 uses a lookup table to do the address translation.
The address range of this register is from 16KB to 2GB in memory space.
The address range is divided into 64 pages. The size of each page is defined
by Memory Address Forwarding Control register (Offset 6Ah), which is
initialized by EEPROM (I2C) or SM Bus or local processor. Writing a zero
to the bit [0] of the look up table entry can disable the corresponding page of
this register (CSR Offset 1FFh: 100h).
The number of writeable bit may change depending on the page size setup.
Reset to 00000h
DESCRIPTION
0: Memory space
1: IO space
Reset to 0
00: 32-bit address decode range
01: 64-bit address decode range
10 and 11: reserved
Reset to 00
0: Memory space is non-prefetchable
1: Memory space is prefetchable
Reset to 0
Reset to 0
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110