PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 20

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

3
3.1
3.2
If TM2 is strapped to low, PI7C9X110 uses TM1, TM0, CFN_L, and REVRSB pins to select different modes of
operations. These four input signals are required to be stable during normal operation. One of the sixteen
combinations of normal operation can be selected by setting the logic values for the four mode select pins. For
example, if the logic values are low for all four (TM1, TM0, CFN_L, and REVRSB) pins, the normal operation will
have EEPROM (I2C) support in transparent mode with internal arbiter in forward bridge mode. The designated
operation with respect to the values of the TM1, TM0, CFN_L, and REVRSB pins are defined on Table 3-1:
Table 3-1 Mode Selection
The secondary interface is capable of operating in either conventional PCI mode or in PCI-X mode. PI7C9X110
controls the mode and frequency for the secondary bus by utilizing a pull-up circuit connected to PCIXCAP. There
are two pull-up resistors in the circuit as recommended by the PCI-X addendum. The first resistor is a weak pull-up
(56K ohms) whose value is selected to set the voltage of PCIXCAP below its low threshold when a PCI-X 66MHz
device is attached to the secondary bus. The second resistor is a strong pull-up, externally wired between PCIXCAP
and PCIXUP. The value of the resistor (1K ohm) is selected to set the voltage of PCIXCAP above its high
threshold when all devices on the secondary are PCI-X 66MHz capable. To detect the mode and frequency of the
secondary bus, PCIXUP is initially disabled and PI7C9X110 samples the value on PCIXCAP.
Pericom Semiconductor
MODE SELECTION AND PIN STRAPPING
FUNCTIONAL MODE SELECTION
PCI / PCI-X SELECTION
PIN
B6
B7
B8
B9
B10
B11
B12
B13
B14
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
TM2 Strapped
0
0
0
0
0
0
0
0
DEVSEL_L
VDDC
PAR
SERR_L
CBE [3]
VDDC
NAME
AD [24]
AD [22]
VSS
AD [17]
FRAME_L
TM1
FBCLKIN
VSS
VD33
AD [26]
VD33
AD [19]
AD [16]
VSS
AD [15]
TM1
X
X
X
X
X
X
0
1
PIN
E4
E11
E12
E13
E14
F1
F2
F3
F4
F11
F12
F13
F14
G1
G2
G3
G4
G11
G12
G13
G14
TM0
X
X
X
X
X
X
0
1
NAME
VDDC
VD33
VSS
AD [11]
VSS
TN
VDDAUX
VDDP
VDDP
AD [8]
VD33
AD [9]
AD [10]
TP
VTT
VDDA
RP
AD [6]
AD [7]
VSS
CBE [0]
Page 20 of 145
CFN_L
X
X
X
X
X
X
0
1
PIN
K4
K11
K12
K13
K14
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
M1
M2
REVRSB
CLKOUT [2]
CLKOUT [5]
NAME
VSS
TRST_L
VD33
VSS
AD [0]
VDDC
VDDCAUX
PERST_L
VD33
GNT_L[2]/GPO[0]
VSS
GPIO [3]
GPIO [0]
VDDC
VDDC
TMS
TCK
REQ_L [0]
REQ_L [1]
X
X
X
X
X
X
0
1
EEPROM (I2C) support
SM Bus support
Transparent mode
Non-Transparent mode
Internal arbiter
External arbiter
Forward bridge mode
Reverse bridge mode
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PIN
N8
N9
N10
N11
N12
N13
N14
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
Functional Mode
NAME
VDDC
CLKOUT [1]
VD33
CLKOUT [6]
CLKOUT [8]
INTD_L
IDSEL
REQ_L [6]
REQ_L [7]
INTA_L
VSS
GNT_L[5]/GPO[3]
GNT_L [6]
CLKIN
GPIO [2]
CLKOUT [0]
CLKOUT [3]
VSS
CLKKOUT [7]
INTC_L
MSK_IN
PI7C9X110