PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 94

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PI7C9X110

Manufacturer Part Number
PI7C9X110
Description
Pcie-to-pci Reversible Bridge
Manufacturer
Pericom Semiconductor Corporation
Datasheet

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0
7.5.42 MEMORY ADDRESS FORWARDING CONTROL REGISTER – OFFSET 68h
Pericom Semiconductor
BIT
13:12
15:14
BIT
19:16
20
21
29:22
FUNCTION
Transmitter Termination
Control
Receiver Termination
Control
FUNCTION
Lookup Table Page Size
Lookup Table Page Size
Extension
Upstream 64-bit Address
Range Enable
Reserved
TYPE
TYPE
RW
RW
RW
RW
RW
RO
Page 94 of 145
DESCRIPTION
00: 52 ohms
01: 57 ohms
10: 43 ohms
11: 46 ohms
Reset to 00
00: 52 ohms
01: 57 ohms
10: 43 ohms
11: 46 ohms
Reset to 00
DESCRIPTION
If bit [20] of Offset 68h is low, then
0000: Disable Upstream Memory 2 Base Address Register
0001: 256 bytes
0010: 512 bytes
0011: 1K bytes
0100: 2K bytes
0101: 4K bytes
0110: 8K bytes
0111: 16K bytes
1000: 32K bytes
1001: 64K bytes
1010: 128K bytes
1011: 256K bytes
1100: 512K bytes
1101: 1M bytes
1110: 2M bytes
1111: 4M bytes
If bit [20] of Offset 68h is high, then
0000: Disable Upstream Memory 2 Base Address Register
0001: 8M bytes
0010: 16M bytes
0011: 32M bytes
01XX: Disable Upstream Memory 2 Base Address Register
1XXX: Disable Upstream Memory 2 Base Address Register
Reset to 0h
0: Normal Lookup Table Page Size
1: Coarse Lookup Table Page Size
Reset to 0
0: Any 64-bit address transactions on secondary interface falling outside of
Downstream Memory 3 address range are forwarded upstream
1: Enable 64-bit address transaction forwarding upstream based on Upstream
Memory 3 address range without address translation
Reset to 0
Reset to 0
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110

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