PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 4

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

TABLE OF CONTENTS
1
2
3
4
5
6
7
1.1
1.2
1.3
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
3.1
3.2
3.3
5.1
5.2
6.1
6.2
7.1
7.2
7.3
7.4
INTRODUCTION ........................................................................................................................ 14
PIN DEFINITIONS ...................................................................................................................... 16
MODE SELECTION AND PIN STRAPPING.......................................................................... 20
FORWARD AND REVERSE BRIDGING ................................................................................ 22
TRANSPARENT AND NON-TRANSPARENT BRIDGING.................................................. 24
PCI EXPRESS FUNCTIONAL OVERVIEW........................................................................... 26
CONFIGURATION REGISTERS.............................................................................................. 26
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
7.4.8
7.4.9
7.4.10
7.4.11
7.4.12
7.4.13
7.4.14
Pericom Semiconductor
PCI EXPRESS FEATURES................................................................................................................................ 14
PCI / PCI-X FEATURES..................................................................................................................................... 15
GENERAL FEATURES ..................................................................................................................................... 15
SIGNAL TYPES ................................................................................................................................................. 16
PCI EXPRESS SIGNALS ................................................................................................................................... 16
PCI SIGNALS..................................................................................................................................................... 16
MODE SELECT AND STRAPPING SIGNALS ................................................................................................ 18
JTAG BOUNDARY SCAN SIGNALS............................................................................................................... 18
MISCELLANEOUS SIGNALS .......................................................................................................................... 18
POWER AND GROUND PINS .......................................................................................................................... 19
PIN ASSIGNMENTS.......................................................................................................................................... 19
FUNCTIONAL MODE SELECTION ................................................................................................................ 20
PCI / PCI-X SELECTION ................................................................................................................................... 20
PIN STRAPPING................................................................................................................................................ 21
TRANSPARENT MODE.................................................................................................................................... 24
NON-TRANSPARENT MODE.......................................................................................................................... 24
TLP STRUCTURE.............................................................................................................................................. 26
VIRTUAL ISOCHRONOUS OPERATION....................................................................................................... 26
CONFIGURATION REGISTER MAP............................................................................................................... 27
PCI EXPRESS EXTENDED CAPABILITY REGISTER MAP ......................................................................... 30
CONTROL AND STATUS REGISTER MAP.................................................................................................... 31
PCI CONFIGURATION REGISTERS FOR TRANSPARENT BRIDGE MODE ............................................. 32
VENDOR ID – OFFSET 00h ................................................................................................................ 33
DEVICE ID – OFFSET 00h.................................................................................................................. 33
COMMAND REGISTER – OFFSET 04h .............................................................................................. 33
PRIMARY STATUS REGISTER – OFFSET 04h................................................................................... 34
REVISION ID REGISTER – OFFSET 08h ........................................................................................... 35
CLASS CODE REGISTER – OFFSET 08h ........................................................................................... 35
CACHE LINE SIZE REGISTER – OFFSET 0Ch.................................................................................. 35
PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch .................................................................. 36
PRIMARY HEADER TYPE REGISTER – OFFSET 0Ch ...................................................................... 36
RESERVED REGISTERS – OFFSET 10h TO 17h................................................................................ 36
PRIMARY BUS NUMBER REGISTER – OFFSET 18h ........................................................................ 36
SECONDARY BUS NUMBER REGISTER – OFFSET 18h .................................................................. 36
SUBORDINATE BUS NUMBER REGISTER – OFFSET 18h .............................................................. 36
SECONDARY LATENCY TIME REGISTER – OFFSET 18h................................................................ 36
Page 4 of 145
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110