PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 80

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

7.5.15 DOWNSTREAM MEMORY 3 UPPER BASE ADDRESS REGISTER – OFFSET 24h
7.5.16 RESERVED REGISTER – OFFSET 28h
7.5.17 SUBSYTEM ID AND SUBSYSTEM VENDOR ID REGISTER – OFFSET 2Ch
7.5.18 RESERVED REGISTER – OFFSET 30h
7.5.19 CAPABILITY POINTER – OFFSET 34h
7.5.20 EXPANSION ROM BASE ADDRESS REGISTER – OFFSET 38h
7.5.21 PRIMARY INTERRUPT LINE REGISTER – OFFSET 3Ch
7.5.22 PRIMARY INTERRUPT PIN REGISTER – OFFSET 3Ch
Pericom Semiconductor
BIT
31:0
BIT
15:0
31:16
BIT
31:8
7:0
BIT
31:0
BIT
7:0
BIT
FUNCTION
Base address
FUNCTION
Subsystem Vendor ID
Subsystem ID
FUNCTION
Reserved
Capability Pointer
FUNCTION
Expansion ROM Base
Address
FUNCTION
Primary Interrupt Line
FUNCTION
RO/RW
TYPE
TYPE
TYPE
TYPE
TYPE
TYPE
RW
RO
RO
RO
RO
RO
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DESCRIPTION
The size of this Base Address Register is defined from Downstream Memory
3 Upper 32-bit Setup Register (CSR Offset 018h), which can be initialized by
EEPROM (I2C) or SM Bus or Local Processor. Writing a zero to bit [31] of
the setup registers (CSR Offset 018h) to disable this register. This register
defines the upper 32 bits of a memory range for downstream forwarding
memory. If a bit in the setup register is set to one, then the correspondent bit
of this register will be changed to RW.
Reset to 00000000h
DESCRIPTION
Identify the vendor ID for add-in card or subsystem
Reset to 0000h
Identify the vendor specific device ID for add-in card or subsystem
Reset to 0000h
DESCRIPTION
Reset to 0
Capability pointer to 80h
Reset to 80h
DESCRIPTION
Expansion ROM not supported.
Reset to 00000000h
DESCRIPTION
These bits apply to reverse bridge only.
For initialization code to program to tell which input of the interrupt
controller the PI7C9X110’s INTA_L in connected to.
Reset to 00000000
DESCRIPTION
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110