PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 89

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

7.5.32 SECONDARY CACHE LINE SIZE REGISTER – OFFSET 4Ch
7.5.33 SECONDARY LATENCY TIME REGISTER – OFFSET 4Ch
7.5.34 SECONDARY HEADER TYPE REGISTER – OFFSET 4Ch
7.5.35 SECONDARY CSR AND MEMORY 0 BASE ADDRESS REGISTER – OFFSET 50h
Pericom Semiconductor
BIT
30
31
BIT
1:0
2
3
4
5
7:6
BIT
15:8
BIT
22:16
23
31:24
BIT
0
FUNCTION
Arbiter Priority 8
Reserved
FUNCTION
Reserved
Cache Line Size
Cache Line Size
Cache Line Size
Cache Line Size
Reserved
FUNCTION
Secondary Latency Timer
FUNCTION
Other Bridge Configuration
Single Function Device
Reserved
FUNCTION
Space Indicator
TYPE
TYPE
TYPE
TYPE
TYPE
RO /
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
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DESCRIPTION
0: Low priority request to master 8
1: High priority request to master 8
Reset to 0
Reset to 0
DESCRIPTION
00: Cache line size of 1 DW and 2 DW are not supported
Reset to 00
1: Cache line size = 4 double words
Reset to 0
1: Cache line size = 8 double words
Reset to 0
1: Cache line size = 16 double words
Reset to 0
1: Cache line size = 32 double words
Reset to 0
Bit [7:6] not supported
Reset to 00
DESCRIPTION
8 bits of secondary latency timer in PCI/PCI-X
REVERSE BRIDGE –
RO with reset to 00h
FORWARD BRIDGE –
RW with reset to 00h in PCI mode or 40h in PCI-X mode
DESCRIPTION
Type-0 header format configuration (10 – 3Fh)
Reset to 0000000
0: Indicates single function device
Reset to 0
Reset to 00h
DESCRIPTION
0: Memory space
1: IO space
Reset to 0
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110