PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 135

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

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Using PI7C9X110 on motherboard:
Using PI7C9X110 on add-in card:
PRSNT1# and PRSNT2# are not implemented on both PI7C9X110. The use of these two signals is mandatory on
an add-in card in order to support hot-plug.
PI7C9X110 requires the fundamental reset (PERST_L) input for internal logic when it is set as forward bridge
mode. PI7C9X110 requires the PCI/PCI-X reset (RESET_L) input when it is set as reverse bridge mode. Also,
PI7C9X110 has a power-on-reset (POR) circuit to detect VDDCAUX power supply for auxiliary logic control.
A cold reset is a fundamental or power-on reset that occurs right after the power is applied to PI7C9X110 (during
initial power up). See section 7.1.1 of PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0 for details.
A warm reset is a reset that triggered by the hardware without removing and re-applying the power sources to
PI7C9X110.
A hot reset is a reset that used an in-band mechanism for propagating reset across a PCIe link to PI7C9X110.
PI7C9X110 will enter to training control reset when it receives two consecutive TS1 or TS2 order-sets with reset bit
set.
If the PCIe link goes down, the Transaction and Data Link Layer will enter DL_DOWN status. PI7C9X110
discards all transactions and returns all logic and registers to initial state except the sticky registers.
Upon receiving reset (cold, warm, hot, or DL_DOWN) on PCIe interface, PI7C9X110 will generate PCI/PCI-X
reset (RESET_L) to the downstream devices on the PCI/PCI-X bus in forward bridge mode. The PCI/PCI-X reset
de-assertion follows the de-assertion of the reset received from PCIe interface. The reset bit of Bridge Control
Register may be set depending on the application. PI7C9X110 will tolerant to receive and process SKIP order-sets
Pericom Semiconductor
RESET SCHEME
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PI7C9X110 supports hot-plug on PCI bus if forward bridging is selected (REVRSB=0).
PI7C9X110 supports hot-plug function on PCI Express bus when reverse bridge mode is selected
(REVRSB=1).
PI7C9X110 supports hot-plug on PCI Express bus in forward bridge mode. Hot-plug messages will be
generated by PI7C9X110 based on the add-in card conditions.
PI7C9X110 supports hot-plug function on PCI bus when reverse bridge mode is selected. PI7C9X110 will
tri-state the PCI bus when RESET is asserted. Also, PI7C9X110 will de-assert INTA_L if RESET is
asserted. The state machine of PI7C9X110 PCI bus interface will remain idle if the RESET is asserted.
After RESET is de-asserted, PI7C9X110 will remain in idle state until an address phase containing a valid
address for PI7C9X110 or its downstream devices.
PI7C9X110 expects the REFCLK signal will be provided to its upstream PCI Express Port prior to the de-
assertion of RESET. The Downstream PCI Port of PI7C9X110 supports a range of frequency up to
66MHz.
PI7C9X110 also supports subsystem vendor and subsystem ID. PI7C9X110 will ignore target response
while the bus is idle.
Cold Reset:
Warm Reset:
Hot Reset:
DL_DOWN Reset:
Page 135 of 145
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110