PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 38

• Manufacturer Part Number: PI7C9X110
• Description: Pcie-to-pci Reversible Bridge
• Manufacturer: Pericom Semiconductor Corporation

7.4.18 MEMORY BASE REGISTER – OFFSET 20h
7.4.19 MEMORY LIMIT REGISTER – OFFSET 20h
7.4.20 PREFETCHABLE MEMORY BASE REGISTER – OFFSET 24h
7.4.21 PREFETCHABLE MEMORY LIMIT REGISTER – OFFSET 24h
Pericom Semiconductor
BIT
28
29
30
31
BIT
3:0
15:4
BIT
19:16
31:20
BIT
3:0
15:4
BIT
FUNCTION
Received Target Abort
Received Master Abort
Received System Error
Detected Parity Error
FUNCTION
Reserved
Memory Base
FUNCTION
Reserved
Memory Limit
FUNCTION
64-bit Addressing Support
Prefetchable Memory Base
FUNCTION
TYPE
TYPE
TYPE
TYPE
TYPE
RWC
RWC
RWC
RWC
RW
RW
RW
RO
RO
RO
Page 38 of 145
DESCRIPTION
FORWARD BRIDGE –
Bit is set when PI7C9X110 detects target abort on the secondary interface
REVERSE BRIDGE –
Bit is set when PI7C9X110 receives a completion with completer abort
completion status on the secondary interface
Reset to 0
FORWARD BRIDGE –
Bit is set when PI7C9X110 detects master abort on the secondary interface
REVERSE BRIDGE –
Bit is set when PI7C9X110 receives a completion with unsupported request
completion status on the primary interface
Reset to 0
FORWARD BRIDGE –
Bit is set when PI7C9X110 detects SERR_L assertion on the secondary
interface
REVERSE BRIDGE –
Bit is set when PI7C9X110 receives an ERR_FATAL or
ERR_NON_FATAL message on the secondary interface
Reset to 0
FORWARD BRIDGE –
Bit is set when PI7C9X110 detects address or data parity error
REVERSE BRIDGE –
Bit is set when PI7C9X110 detects poisoned TLP on secondary interface
Reset to 0
DESCRIPTION
Reset to 0000
Memory Base (80000000h)
Reset to 800h
DESCRIPTION
Reset to 0000
Memory Limit (000FFFFFh)
Reset to 000h
DESCRIPTION
0001: Indicates PI7C9X110 supports 64-bit addressing
Reset to 0001
Prefetchable Memory Base (00000000_80000000h)
Reset to 800h
DESCRIPTION
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110