ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 108

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
autoincrement of the Flash address stored in the Flash Address registers (FLASH_PAGE,
FLASH_ROW, FLASH_COL).
A typical sequence that performs a single-byte I/O Write is shown below. Because the
Write is self-timed,
ing or interrupts.
1. Write the FLASH_PAGE, FLASH_ROW, and FLASH_COL registers with the
2. Write the data value to the FLASH_DATA register.
Multibyte I/O Write (Row Programming)
Multibyte I/O Write operations use the same I/O registers as single-byte Writes.
Multibyte I/O Writes allow the programming of full row and are enabled by setting the
ROW_PGM bit of the Flash Program Control Register. For multibyte I/O Writes, the CPU
sets the address registers, enables row programming, and then executes an I/O instruction
(with repeat) to load the block of data into the FLASH_DATA register. For each individual
byte written to the FLASH_DATA register during the block move, the Flash controller
asserts the internal WAIT signal to stall the CPU until the current byte is programmed.
Each access to the FLASH_DATA register causes an autoincrement of the Flash address
stored in the Flash Address registers (FLASH_PAGE, FLASH_ROW, FLASH_COL).
During row programming, the Flash controller continuously asserts the Flash memory’s
high voltage signal until all bytes are programmed (column address < 255). As a result, the
row programs more quickly than if the high-voltage signal is toggled for each byte. The
per-byte programming time during row programming is between 41 µs and 52 µs. As such,
programming 256 bytes of a row in this mode takes not more than 13.4 ms, leaving 17.6
A typical sequence that performs a multibyte I/O Write is shown below:
1. Check the FLASH_IRQ register to ensure that any previous row program is
2. Write the FLASH_PAGE, FLASH_ROW, and FLASH_COL registers with the
3. Set the ROW_PGM bit in the FLASH_PGCTL register to enable row programming
4. Write the next data value to the FLASH_DATA register.
5. If the end of the row has not been reached, return to
During row programming, software must monitor the row time-out error bit either by
enabling this interrupt or via polling. If a row time-out occurs, the Flash controller aborts
the row programming operation, and software must assure that no further Writes are
performed to the row without it first being erased. It is suggested that row programming is
be used one time per row and not in combination with single-byte Writes to the same row
ms for CPU instruction overhead to fetch the 256 bytes.
address of the byte to be written.
completed.
address of the first byte to be written.
mode.
step 2
of the sequence is repeated back-to-back without requiring poll-
step
4.
Product Specification
eZ80F91 ASSP
Flash Memory
100