ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 149

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
Timer Input Capture Value A Register—High Byte
The Timer x Input Capture Value A Register—High Byte (see
byte of the capture value for external input A. For Timer 1, the external input is IC0. For
Timer 3, it is IC2.
Table 63. Timer Input Capture Value Register A—High Byte
= 006Ch, TMR3_CAPA_H = 007Dh)
Timer Input Capture Value B Register—Low Byte
The Timer x Input Capture Value B Register—Low Byte (see
byte of the capture value for external input B. For Timer 1, the external input is IC1. For
Timer 3, it is IC3.
Table 64. Timer Input Capture Value Register B—Low Byte
006Dh, TMR3_CAPB_L = 007Eh)
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
x
x
_CAPA_H
_CAPB_L
Value
00h–FFh
Value
00h–FFh
R
R
7
0
7
0
Description
These bits represent the High byte of the 2-byte capture
value, {TMR
bit 15 (msb) of the 16-bit data value. Bit 0 is bit 8 of the 16-
bit timer data value.
Description
These bits represent the Low byte of the 2-byte capture
value, {TMR
bit 7 of the 16-bit data value. Bit 0 is bit 0 (lsb) of the
16-bit timer data value.
R
R
6
0
6
0
x
x
_CAPA_H[7:0], TMR
_CAPB_H[7:0], TMR
R
R
5
0
5
0
R
R
4
0
4
0
R
R
3
0
3
0
Table
Table
Programmable Reload Timers
Product Specification
x
x
_CAPA_L[7:0]}. Bit 7 is
_CAPB_L[7:0]}. Bit 7 is
64) stores the Low
R
R
63) stores the High
2
0
2
0
(TMR1_CAPB_L =
(TMR1_CAPA_H
eZ80F91 ASSP
R
R
1
0
1
0
R
R
0
0
0
0
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