ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 152

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
Timer Output Compare Value Register—Low Byte
The Timer3 Output Compare x Value Register—Low Byte (see
byte of the compare value for OC0–OC3.
Table 68. Compare Value Register—Low Byte
TMR3_OC1_L = 0084h, TMR3_OC2_L = 0086h, TMR3_OC3_L = 0088h)
[3:2]
OC1_MODE
[1:0]
OC0_MODE
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
TMR3_OCx_L
00
01
10
11
00
01
10
11
Value
00h–FFh
R/W
7
0
Initialize OC pin to value specified in
TMR3_OC_CTL1[OC1_INT].
OC pin is cleared upon timer compare.
OC pin is set upon timer compare.
OC pin toggles upon timer compare.
Initialize OC pin to value specified in
TMR3_OC_CTL1[OC0_INT].
OC pin is cleared upon timer compare.
OC pin is set upon timer compare.
OC pin toggles upon timer compare.
Description
These bits represent the Low byte of the 2-byte compare
value, {TMR3_OCx_H[7:0], TMR3_OCx_L[7:0]}. Bit 7 is bit
7 of the 16-bit data value. Bit 0 is bit 0 (lsb) of the 16-bit
timer compare value.
R/W
6
0
R/W
5
0
R/W
4
0
(TMR3_OC0_L = 0082h,
R/W
3
0
Programmable Reload Timers
Table
Product Specification
R/W
2
0
68) stores the Low
eZ80F91 ASSP
R/W
1
0
R/W
0
0
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