ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 21
ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
78
79
80
81
82
83
84
85
BGA
Pin No Symbol
K12
K11
H8
J11
J12
J10
G7
H12
PD5
DSR0
PD6
DCD0
PD7
RI0
V
V
LOOP_FILT PLL Loop Filter Analog
PLL_V
X
DD
SS
OUT
SS
Function
GPIO Port D
Data Set
Ready
GPIO Port D
Data Carrier
Detect
GPIO Port D
Ring Indicator Input, Active Low Modem status signal to the UART.
Power Supply
Ground
Ground
System Clock
Oscillator
Output
Signal Direction Description
Bidirectional
Input, Active Low Modem status signal to the UART.
Bidirectional
Input, Active Low Modem status signal to the UART.
Bidirectional
Output
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port D
pin, when programmed as output is
selected to be an open-drain or
open-source output. Port D is
multiplexed with one UART.
This signal is multiplexed with PD5.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port D
pin, when programmed as output is
selected to be an open-drain or
open-source output. Port D is
multiplexed with one UART.
This signal is multiplexed with PD6.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port D
pin, when programmed as output is
selected to be an open-drain or
open-source output. Port D is
multiplexed with one UART.
This signal is multiplexed with PD7.
Power Supply.
Ground.
Loop Filter pin for the Analog PLL.
Ground for Analog PLL.
This pin is the output of the onboard
crystal oscillator. When used, a
crystal must be connected between
X
IN
and X
OUT
Product Specification
.
Architectural Overview
eZ80F91 ASSP
13
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