ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 228

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 119. I
PS027001-0707
Code
38h
68h
B0h
D0h
D8h
Notes
1. W is defined as the Write bit; that is, the lsb is cleared to 0.
2. AAK is an I 2 C control bit that identifies which ACK signal to transmit.
3. R is defined as the Read bit; that is, the lsb is set to 1.
I
Arbitration lost
Arbitration lost,
SLA+W received,
ACK transmitted
Arbitration lost,
SLA+R received,
ACK transmitted
Second address byte
+ W transmitted,
ACK received
Second address byte
+ W transmitted,
ACK not received
2
C State
2
C 10-Bit Master Transmit Status Codes
If 10-bit addressing is used, the status code is
address, plus the Write bit, are successfully transmitted.
After this interrupt is serviced and the second part of the 10-bit address is transmitted, the
I2C_SR register contains one of the codes listed in
1
3
ASSP Response
Clear IFLG
Or set STA, clear IFLG
Clear IFLG, clear AAK = 0
Or clear IFLG, set AAK = 1
Write byte to DATA,
clear IFLG, clear AAK = 0
Or write byte to DATA,
clear IFLG, set AAK = 1
Write byte to data,
clear IFLG
Or set STA, clear IFLG
Or set STP, clear IFLG
Or set STA & STP,
clear IFLG
Same as code D0h
18h
2
or
Table
Next I
Return to idle
Transmit START when bus free
Receive data byte, transmit NACK
Receive data byte, transmit ACK
Transmit last byte,
receive ACK
Transmit data byte,
receive ACK
Transmit data byte,
receive ACK
Transmit repeated START
Transmit STOP
Transmit STOP then
START
Same as code D0h
20h
119.
2
after the first part of a 10-bit
C Action
Product Specification
I
2
C Serial I/O Interface
eZ80F91 ASSP
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