AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 138

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

CSR85: DMA Address Register Upper
Bit
31-16 RES
15-0
CSR86: Buffer Byte Counter
Bit
31-16 RES
15-12 RES
11-0
CSR88: Chip ID Register Lower
Bit
31-28 VER
138
DMABAU
DMABC
Name
Name
Name
Reserved locations. Written as
zeros and read as undefined.
This register contains the upper
16 bits of the address of system
memory for the current DMA cy-
cle. The Bus Interface Unit con-
trols the Address Register by
issuing increment commands to
increment the memory address for
sequential operations. The DMA-
BAU register is undefined until the
first Am79C978A controller DMA
operation.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
Reserved locations. Written as
zeros and read as undefined.
Reserved. Read and written with
ones.
DMA Byte Count Register. Con-
tains the two’s complement of the
current size of the remaining
transmit or receive buffer in bytes.
This register is incremented by the
Bus Interface Unit. The DMABC
register is undefined until written.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
Version. This 4-bit pattern is
silicon-revision dependent.
Read accessible only when either
the STOP or the SPND bit is set.
Description
Description
Description
Am79C978A
27-12 PARTID
11-1
0
CSR89: Chip ID Register Upper
Bit
31-16 RES
15-12 VER
11-0
MANFID
ONE
PARTIDU
Name
Upper 12 bits of the Am79C978A
VER is read only. Write opera-
tions are ignored.
Part number. The 16-bit code for
the Am79C978A controller is
0010 0110 0010 0110 (2626h).
This register is exactly the same
as the Device ID register in the
JTAG description. However, this
part number is different from that
stored in the Device ID register in
the PCI configuration space.
Read accessible only when ei-
ther the STOP or the SPND bit is
set. PARTID is read only. Write
operations are ignored.
Manufacturer ID. The 11-bit man-
ufacturer
00000000001b. This code is per
the JEDEC Publication 106-A.
Note that this code is not the
same as the Vendor ID in the PCI
configuration space.
Read accessible only when either
the STOP or the SPND bit is set.
VER is read only. MANFID is
read only. Write operations are
ignored.
Always a logic 1.
Read accessible only when ei-
ther the STOP or the SPND bit is
set. VER is read only. ONE is
read only. Write operations are
ignored.
Reserved locations. Read as un-
defined.
Version. This 4-bit pattern is
silicon-revision dependent.
Read accessible only when either
the STOP or the SPND bit is set.
VER is read only. Write opera-
tions are ignored.
controller part number, i.e., 0010
0110 0010b (262h).
Description
code
for
AMD
is