AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 147
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AM79C978A
Manufacturer Part Number
AM79C978A
Description
Single-Chip 1/10 Mbps PCI Home Networking Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C978A.pdf
(256 pages)
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8
7
6
5
FDLSE
PSE
LNKSE
RCVME
Full-Duplex Link Status En-
Receive Match Status Enable.
able. Indicates the Full-Duplex
Link Test Status. When this bit
is set, a value of 1 is passed to
the LEDOUT signal when the
Am79C978A controller is func-
tioning in a Link Pass state and
full-duplex operation is en-
abled. When the Am79C978A
controller is not functioning in
a Link Pass state with full-du-
plex operation being enabled,
a value of 0 is passed to the
LEDOUT signal.
This bit is always read/write ac-
cessible. FDLSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP bit.
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
This bit is always read/write ac-
cessible. PSE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
when in Link Pass state.
This bit is always read/write ac-
cessible. LNKSE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
This bit is always read/write ac-
cessible. RCVME is cleared by
H_RESET and is not affected
Am79C978A
4
3
2
1
0
BCR5: LED1 Status
BCR5 controls the function(s) that the LED1 pin dis-
plays. Multiple functions can be simultaneously en-
abled on this LED pin. The LED display will indicate the
logical OR of the enabled functions. BCR5 defaults to
Receive Status (RCV) with pulse stretcher enabled
(PSE = 1) and is fully programmable.
Note: When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED1 Status register is enabled.
When LEDPE is cleared to 0, programming of the
XMTE
POWER
RCVE
SPEED
COLE
Transmit Status Enable. When
Receive Status Enable. When
by S_RESET or setting the
STOP bit.
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
This bit is always read/write ac-
cessible. XMTE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
Power. When this bit is set to 1,
the device is operating in HIGH
power mode.
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
This bit is always read/write ac-
cessible. RCVE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
Speed. When this bit is set to 1,
the device is operating in HIGH
speed mode.
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
This bit is always read/write ac-
cessible. COLE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
147
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