AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 154

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

BCR16: I/O Base Address Lower
Bit
31-16 RES
15-5
4-0
BCR17: I/O Base Address Upper
Bit
31-16 RES
15-0
BCR18: Burst and Bus Control Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15-12 ROMTMG
154
IOBASEL
RES
IOBASEU
Name
Name
Name
Note: Do not set this bit when
Auto-Negotiation is enabled.
Expansion ROM Timing. The val-
This bit is always read/write ac-
cessible. FDEN is reset to 0 by
H_RESET, and is unaffected by
S_RESET and the STOP bit.
Reserved locations. Written as
zeros and read as undefined.
Reserved
H_RESET, the value of these
bits will be undefined. The set-
tings of these bits will have no
effect
controller function.
These bits are always read/write
accessible. IOBASEL is not af-
fected by S_RESET or STOP.
Reserved locations. Written as
zeros, read as undefined.
Reserved locations. Written as
zeros and read as undefined.
Reserved
H_RESET, the value in this regis-
ter will be undefined. The settings
of this register will have no effect
on any Am79C978A controller
function.
This bit is always read/write ac-
cessible. IOBASEU is not affected
by S_RESET or STOP.
Reserved locations. Written as
zeros and read as undefined.
ue of ROMTMG is used to tune
the
(BCR30) accesses to Flash/
Description
Description
Description
timing
on
any
locations.
for
locations.
all
Am79C978A
EBDATA
After
After
Am79C978A
ROMTMG (bits 15-12)
1h < = n < = Fh
Table 37. ROMTNG Programming Values
EPROM as well as all Expansion
ROM accesses to Flash/EPROM.
ROMTMG, during read opera-
tions, defines the time from when
the Am79C978A controller drives
the lower 8 or 16 bits of the Ex-
pansion Bus Address bus to
when the Am79C978A controller
latches in the data on the 8 or 16
bits of the Expansion Bus Data
inputs. ROMTMG, during write
operations, defines the time from
when the Am79C978A controller
drives the lower 8 or 16 bits of the
Expansion Bus Data to when the
EBWE and EROMCS deassert.
The register value specifies the
time in number of clock cycles +1
according to Table 37.
Note: Programming ROMTNG
with a value of 0 is not permitted.
The access time for the Expan-
sion
(BCR30) device (t
operations can be calculated by
subtracting the clock to output de-
lay for the EBUA_EBA[7:0] out-
puts (t
the input to clock setup time for
the EBD[7:0] inputs (t
the time defined by ROMTMG:
t
*CLK_FAC - (t
The access time for the Expan-
sion ROM or for the EBDATA
(BCR30) device (t
write operations can be calculat-
ed by subtracting the clock to out-
put delay for the EBUA EBA[7:0]
outputs (t
the input to clock setup time for
Flash/EPRO inputs (t
the time defined by ROMTMG.
t
CLK_FAC - (t
ACC
ACC
No. of Expansion Bus Cycles
= ROMTMG * CLK period *
= ROMTMG * CLK period
ROM
v_A_D
v_A_D
) and by subtracting
v_A_D
or
n + 1
v_A_D
) and by adding
ACC
the
) - (t
) + (t
) during read
ACC
s_D
s_D
s_D
EBDATA
)
s_D
) from
) from
during
)
)