AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 63

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

tire data portion of the frame. The data portion of the
frame consists of destination address, source address,
length/type, and frame data. The user is responsible for
the correct ordering and content in each of these fields in
the frame. The MAC does not use the content in the
length/type field unless APAD_XMT (CSR4, bit 11) is set
and the data portion of the frame is shorter than 60 bytes.
The MAC engine will detect the incoming preamble se-
quence when the RX_DV signal is activated by the in-
ternal PHY. The MAC will discard the preamble and
begin searching for the SFD. Once the SFD is de-
tected, all subsequent nibbles are treated as part of the
frame. The MAC engine will inspect the length field to
ensure minimum frame size, strip unnecessary pad
characters (if enabled), and pass the remaining bytes
through the receive FIFO to the host. If pad stripping is
performed, the MAC engine will also strip the received
FCS bytes, although normal FCS computation and
checking will occur. Note that apart from pad stripping,
the frame will be passed unmodified to the host. If the
length field has a value of 46 or greater, all frame bytes
including FCS will be passed unmodified to the receive
buffer, regardless of the actual frame length.
If the frame terminates or suffers a collision before
64 bytes of information (after SFD) have been re-
ceived, the MAC engine will automatically delete the
frame from the receive FIFO, without host interven-
tion. TheAm79C978A controller has the ability to ac-
cept r unt packets for diagnostic pur poses and
proprietary networks.
Destination Address Handling
The first 6 bytes of information after SFD will be inter-
preted as the destination address field. The MAC en-
gine provides facilities for physical (unicast), logical
(multicast), and broadcast address reception.
Error Detection
The MAC engine provides several facilities which
report and recover from errors on the medium. In
addition, it protects the network from gross errors
due to inability of the host to keep pace with the
MAC engine activity.
On completion of transmission, the following transmit
status is available in the appropriate Transmit Message
Descriptor (TMD) and Control and Status Register
(CSR) areas:
n The number of transmission retry attempts (ONE,
n Whether the MAC engine had to Defer (DEF) due to
n Excessive deferral (EXDEF), indicating that the
MORE, RTRY, and TRC).
channel activity.
transmitter experienced Excessive Deferral on this
transmit frame, where Excessive Deferral is defined
in the ISO 8802-3 (IEEE/ANSI 802.3) standard.
Am79C978A
n Loss of Carrier (LCAR), indicating that there was
n Late Collision (LCOL) indicates that the transmis-
n Collision Error (CERR) indicates that the trans-
In addition to the reporting of network errors, the MAC
engine will also attempt to prevent the creation of any
network error due to the inability of the host to service
the MAC engine. During transmission, if the host fails
to keep the transmit FIFO filled sufficiently, causing an
underflow, the MAC engine will guarantee the message
is either sent as a runt packet (which will be deleted by
the receiving station) or as an invalid FCS (which will
also cause the receiver to reject the message).
The status of each receive message is available in the
appropriate Receive Message Descriptor (RMD) and
CSR areas. All received frames are passed to the host
regardless of any error. The FRAM error will only be re-
ported if an FCS error is detected and there is a non-
integral number of bytes in the message.
During the reception, the FCS is generated on every
nibble (including the dribbling bits) coming from the ca-
ble, although the internally saved FCS value is only up-
dated on the eighth bit (on each byte boundary). The
MAC engine will ignore up to 7 additional bits at the end
of a message (dribbling bits), which can occur under
normal network operating conditions. The framing error
is reported to the user as follows:
n If the number of dribbling bits are 1 to 7 and there is
n If the number of dribbling bits are 1 to 7 and there is
n If the number of dribbling bits is 0, then there is no
n If the number of dribbling bits is 8, then there is no
an interruption in the ability of the MAC engine
to monitor its own transmission. Repeated LCAR
errors indicate a potentially faulty transceiver or
network connection.
sion suffered a collision after the slot time. This is in-
dicative of a badly configured network. Late
collisions should not occur in a normal operating
network.
ceiver did not respond with an SQE Test message
within the first 4 ms after a transmission was com-
pleted. This may be due to a failed transceiver,
disconnected or faulty transceiver drop cable, or
because the transceiver does not support this
feature (or it is disabled). SQE Test is only valid
for 10-Mbps networks.
no FCS error, then there is no Framing error
(FRAM = 0).
a FCS error, then there is also a Framing error
(FRAM = 1).
Framing error. There may or may not be a FCS er-
ror.
Framing error. FCS error will be reported, and the
receive message count will indicate one extra byte.
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