AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 202

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

25
24
23
22-16 RES
15-12 ONES
11-00 BCNT
202
STP
ENP
BPE
Start of Packet indicates that this
is the first buffer to be used by the
Am79C978A controller for this
frame. It is used for data chaining
buffers. The STP bit must be set
in the first buffer of the frame, or
the Am79C978A controller will
skip over the descriptor and poll
the next descriptor(s) until the
OWN and STP bits are set. STP
is set by the host and is not
changed by the Am79C978A
controller.
End of Packet. End of Packet in-
dicates that this is the last buffer
to be used by the Am79C978A
controller for this frame. It is used
for data chaining buffers. If both
STP and ENP are set, the frame
fits into one buffer and there is no
data chaining. ENP is set by the
host and is not changed by the
Am79C978A controller.
Bus Parity Error is set by the
Am79C978A controller when a
parity error occurred on the bus
interface during a data transfers
from the transmit buffer associat-
ed with this descriptor. The
Am79C978A controller will only
set BPE when the advanced par-
ity error handling is enabled by
setting APERREN (BCR20, bit
10) to 1. BPE is set by the
Am79C978A
cleared by the host.
This bit does not exist, when
the Am79C978A controller is
programmed to use 16-bit soft-
ware structures for the descrip-
tor ring entries (BCR20, bits 7-
0, SWSTYLE is cleared to 0).
Reserved locations.
These four bits must be written as
ones. This field is written by the
host and unchanged by the
Am79C978A controller.
Buffer Byte Count is the usable
length of the buffer pointed to by
this descriptor, expressed as the
two’s complement of the length of
the buffer. This is the number of
bytes from this buffer that will be
controller
Am79C978A
and
TMD2
Bit
31
30
BUFF
UFLO
Name
Underflow error indicates that the
transmitted by the Am79C978A
controller. This field is written by
the host and is not changed by
the
There are no minimum buffer size
restrictions.
Buffer
Am79C978A
transmission
Am79C978A controller does not
find the ENP flag in the current
descriptor and does not own the
next descriptor. This can occur in
either of two ways:
1. The OWN bit of the next buffer
is 0.
2. FIFO underflow occurred be-
fore the Am79C978A controller
obtained
(TMD1[31:24]) of the next de-
scriptor. BUFF is set by the
Am79C978A
cleared by the host.
If a Buffer Error occurs, an Under-
flow Error will also occur. BUFF is
set by the Am79C978A controller
and cleared by the host.
transmitter has truncated a mes-
sage because it could not read
data from memory fast enough.
UFLO indicates that the FIFO has
emptied before the end of the
frame was reached.
When DXSUFLO (CSR3, bit 6) is
cleared to 0, the transmitter is
turned off when an UFLO error
occurs (CSR0, TXON = 0).
When DXSUFLO is set to 1, the
Am79C978A controller grace-
fully recovers from an UFLO er-
ror.
descriptor ring until it finds the
start of a new frame and starts a
new transmission.
UFLO is set by the Am79C978A
controller and cleared by the host.
Description
It
Am79C978A
error
scans
the
controller
is
controller
STATUS
when
the
set
controller.
transmit
by
during
byte
and
the
the