AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 162

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

BCR22: PCI Latency Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15-8
7-0
162
MAX_LAT
MIN_GNT
Name
Reserved locations. Written as
zeros and read as undefined.
Maximum Latency. Specifies the
maximum arbitration latency the
Am79C978A controller can sus-
tain without causing problems to
the network activity. The register
value specifies the time in units of
1/4 microseconds. MAX_LAT is
aliased to the PCI configuration
space register MAX_LAT (offset
3Fh). The host will use the value in
the register to determine the set-
ting of the Am79C978A Latency
Timer register.
Read accessible always; write
accessible only when either the
STOP or the SPND bit is set.
MAX_LAT is set to the value of
FFh by H_RESET which results
in a default maximum latency of
63.75 microseconds. It is recom-
mended to program the value of
18h via EEPROM. MAX_LAT is
not affected by S_RESET or
STOP.
Minimum Grant. Specifies the
minimum length of a burst peri-
od the Am79C978A controller
needs to keep up with the net-
work activity. The length of the
burst period is calculated as-
suming a clock rate of 33 MHz.
The register value specifies the
time
MIN_GNT is aliased to the PCI
Configuration Space register
MIN_GNT (offset 3Eh). The
host will use the value in the
register to determine the setting
of the Am79C978A Latency
Timer register.
Read accessible always; write
accessible only when either the
STOP or the SPND bit is set.
MIN_GNT is set to the value of
06h by H_RESET which results
in a default minimum grant of
Description
in
units
of
1/4
Am79C978A
ms.
BCR23: PCI Subsystem Vendor ID Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-0
15-0
BCR24: PCI Subsystem ID Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15-0
RES
SVID
SID
Name
Name
Reserved locations. Written as
Subsystem ID. SID is used to-
1.5 ms, which is the time it takes
to Am79C978A controller to read/
write half of the FIFO. (16 DWord
transfers in burst mode with one
extra wait state per data phase
inserted by the target.) Note that
the default is only a typical value.
It also does not take into account
any descriptor accesses. It is rec-
ommended to program the value
of 18h via EEPROM. MIN_GNT
is not affected by S_RESET or
STOP.
Reserved locations. Written as
zeros and read as undefined.
Subsystem Vendor ID. SVID is
used together with SID (BCR24,
bits 15-0) to uniquely identify the
add-in board or subsystem the
Am79C978A controller is used in.
Subsystem Vendor IDs can be ob-
tained from the PCI SIG. A value
of 0 (the default) indicates that the
Am79C978A controller does not
support subsystem identification.
SVID is aliased to the PCI Config-
uration Space register Subsystem
Vendor ID (offset 2Ch).
This bit is always read accessi-
ble. SVID is read only. Write op-
erations are ignored. SVID is
cleared to 0 by H_RESET and is
not affected by S_RESET or by
setting the STOP bit.
zeros and read as undefined.
gether with SVID (BCR23, bits
15-0) to uniquely identify the add-
in
Am79C978A controller is used in.
Description
Description
board
or
subsystem
the