AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 59

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

.
Polling
If there is no network channel activity and there is no
pre- or post-receive or pre- or post-transmit activity
being performed by the Am79C978A controller, then
the Am79C978A controller will periodically poll the cur-
rent receive and transmit descriptor entries in order to
ascertain their ownership. If the DPOLL bit in CSR4 is
set, then the transmit polling function is disabled.
A typical polling operation consists of the following se-
quence. TheAm79C978A controller will use the current
receive descriptor address stored internally to vector to
the appropriate Receive Descriptor Table Entry
(RDTE). It will then use the current transmit descriptor
address (stored internally) to vector to the appropriate
Transmit Descriptor Table Entry (TDTE). The accesses
will be made in the following order: RMD1, then RMD0
of the current RDTE during one bus arbitration, and
after that, TMD1, then TMD0 of the current TDTE dur-
ing a second bus arbitration. All information collected
during polling activity will be stored internally in the ap-
propriate CSRs, if the OWN bit is set (i.e., CSR18,
CSR19, CSR20, CSR21, CSR40, CSR42, CSR50,
CSR52).
TLE RES RLE RES
IADR[31:16]
CSR2
RES
Initialization
LADRF[63:32]
LADRF[31:0]
RDRA[31:0]
PADR[31:0]
TDRA[31:0]
Block
PADR[47:32]
IADR[15:0]
CSR1
Figure 34. 32-Bit Software Model
MODE
Am79C978A
Buffers
Buffers
Xmt
Rcv
A typical receive poll is the product of the following
conditions:
1. The controller does not own the current RDTE and
2. The controller does not own the next RDTE and
If RXON is cleared to 0, the Am79C978A controller will
never poll RDTE locations.
In order to avoid missing frames, the system should
have at least one RDTE available. To minimize poll ac-
tivity, two RDTEs should be available. In this case, the
poll operation will only consist of the check of the status
of the current TDTE.
1st
desc.
start
RMD
1st
desc.
start
TMD0
the poll time has elapsed and RXON = 1 (CSR0,
bit 5), or
there is more than one receive descriptor in the ring
and the poll time has elapsed and RXON = 1.
Buffer
Buffer
Data
Data
1
1
RMD
Rcv Descriptor
TMD1 TMD2 TMD3
N
Xmt Descriptor
M
Ring
RMD
Ring
Buffer
Buffer
N
Data
Data
2
2
M
RMD
N
M
2nd
desc.
start
2nd
desc.
start
RMD
N
TMD0
M
•
Buffer
Buffer
Data
Data
•
•
N
M
•
•
•
22399A-37
59