AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 171

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

BCR38: PCI DATA Register 1 (DATA1) Alias Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PMCSR register.
Since these two are read only, BCR38 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
one. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
15-10 RES
9-8
7-0
BCR39: PCI DATA Register 2 (DATA2) Alias Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PMCSR register.
Since these two are read only, BCR39 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
two. Bits 15-0 in this register are programmable
through the EEPROM.
Name
D1_SCALE
DATA1
Description
This bit is always read accessi-
ble. DATA0 is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the
STOP bit.
Reserved locations. Written as
zeros and read as undefined.
These bits correspond to the
DATA_SCALE field of the PMCSR
(offset Register 44 of the PCI con-
figuration space, bits 14-13). Refer
to the description of DATA_SCALE
for the meaning of this field.
These bits are always read ac-
cessible. D1_SCALE is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
These bits are always read ac-
cessible. DATA1 is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Am79C978A
Bit
15-10 RES
9-8
7-0
BCR40: PCI DATA Register 3 (DATA3) Alias Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR40 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
three. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
15-10 RES
9-8
Name
D2_SCALE These bits correspond to the
DATA2
Name
D3_SCALE
Description
Reserved locations. Written as
Description
Reserved locations. Written as
These bits correspond to the
zeros and read as undefined.
DATA_SCALE
PMCSR (offset Register 44 of the
PCI configuration space, bits 14-
13). Refer to the description of
DATA_SCALE for the meaning of
this field.
These bits are always read ac-
cessible. D2_SCALE is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
These bits are always read ac-
cessible. DATA2 is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
zeros and read as undefined.
DATA_SCALE field of the PMCSR
(offset Register 44 of the PCI con-
figuration space, bits 14-13). Refer
to the description of DATA_SCALE
for the meaning of this field.
These bits are always read ac-
cessible. D3_SCALE is read only.
field
of
171
the