IPR-NIOS Altera, IPR-NIOS Datasheet - Page 118

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

4–10
Nios II Processor Reference Handbook
Control Registers
Exception Checking
The Assign cpuid control register value manually control register setting provides
the following functionality. When on, you can assign the cpuid control register value
yourself. Normally, cpuid is automatically assigned in your SOPC Builder system. To
assign the value yourself, type a 32-bit value (in hexadecimal or decimal format) into
the cpuid control register value box.
The Exception Checking settings provide the following options:
■
■
■
Illegal instruction—When Illegal instruction is on, the processor generates an
illegal instruction exception when an instruction with an undefined opcode or
opcode-extension field is executed.
1
Division error—Division error detection is only available for the Nios II/f core,
and only then when Hardware Divide on the Core Nios II page is on. When
divide instructions are not supported by hardware, the Division error setting is
disabled.
When Division error is on, the processor generates a division error exception
when it detects divide instructions that produce a result that cannot be represented
in the destination register. This only happens in the following two cases:
■
■
Misaligned memory access—Misaligned memory access detection is only
available for the Nios II/f core. When Misaligned memory access is on, the
processor checks for misaligned memory accesses.
Divide by zero
Divide overflow—A signed division that divides the largest negative number
-2147483648 (0x80000000) by -1 (0xffffffff).
When your system contains an MMU or MPU, the processor automatically
generates illegal instruction exceptions. Therefore, the Illegal instruction
setting is always disabled when the Core Nios II page Include MMU or
Include MPU are on.
Chapter 4: Instantiating the Nios II Processor in SOPC Builder
December 2010 Altera Corporation
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