IPR-NIOS Altera, IPR-NIOS Datasheet - Page 125

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 4: Instantiating the Nios II Processor in SOPC Builder
Custom Instructions Page
Custom Instructions Page
December 2010 Altera Corporation
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Debug level 4 also supports manual 2X clock signal specification. If you want to use a
specific 2X clock signal in your FPGA design, turn off Automatically generate
internal 2X clock signal and drive a 2X clock signal into your SOPC Builder system
manually.
For further details on trace frames, refer to the
Nios II Processor Reference Handbook.
The Custom Instructions page allows you to connect custom instruction logic to the
Nios II arithmetic logic unit (ALU). You can achieve significant performance
improvements, often on the order of 10x to 100x, by implementing
performance-critical operations in hardware using custom instruction logic.
Figure 4–6
To add a custom instruction to the Nios II processor, select the custom instruction
from the list at the left side of the page, and click Add. The added instruction appears
on the right side of the page.
To display custom instructions in the table of active components on the SOPC Builder
System Contents tab, click Filter in the lower right of the System Contents tab, and
turn on Nios Custom Instruction.
shows an example of the Custom Instructions page.
Processor Architecture
Nios II Processor Reference Handbook
chapter of the
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