IPR-NIOS Altera, IPR-NIOS Datasheet - Page 48

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

3–2
Nios II Processor Reference Handbook
Supervisor Mode
User Mode
1
■
■
The following sections define the modes, their relationship to your system software
and application code, and their relationship to the Nios II MMU and Nios II MPU.
Refer to
Nios II MMU. Refer to
about the Nios II MPU.
Supervisor mode allows unrestricted operation of the processor. All code has access to
all processor instructions and resources. The processor may perform any operation
the Nios II architecture provides. Any instruction may be executed, any I/O operation
may be initiated, and any area of memory may be accessed.
Operating systems and other system software run in supervisor mode. In systems
with an MMU, application code runs in user mode, and the operating system,
running in supervisor mode, controls the application’s access to memory and
peripherals. In systems with an MPU, your system software controls the mode in
which your application code runs. In Nios II systems without an MMU or MPU, all
application and system code runs in supervisor mode.
Code that needs direct access to and control of the processor runs in supervisor mode.
For example, the processor enters supervisor mode whenever a processor exception
(including processor reset or break) occurs. Software debugging tools also use
supervisor mode to implement features such as breakpoints and watchpoints.
For systems without an MMU or MPU, all code runs in supervisor mode.
User mode is available only when the Nios II processor in your hardware design
includes an MMU or MPU. User mode exists solely to support operating systems.
Operating systems (that make use of the processor’s user mode) run your application
code in user mode. The user mode capabilities of the processor are a subset of the
supervisor mode capabilities. Only a subset of the instruction set is available in user
mode.
The operating system determines which memory addresses are accessible to user
mode applications. Attempts by user mode applications to access memory locations
without user access enabled are not permitted and cause an exception. Code running
in user mode uses system calls to make requests to the operating system to perform
I/O operations, manage memory, and access other system functionality in the
supervisor memory.
The Nios II MMU statically divides the 32-bit virtual address space into user and
supervisor partitions. Refer to
for more information about the MMU memory partitions. The MMU provides
operating systems access permissions on a per-page basis. Refer to
Addressing” on page 3–3
Supervisor mode
User mode
“Memory Management Unit” on page 3–3
“Memory Protection Unit” on page 3–8
for more information about MMU pages.
“Address Space and Memory Partitions” on page 3–4
for more information about the
December 2010 Altera Corporation
Chapter 3: Programming Model
for more information
“Virtual
Operating Modes