IPR-NIOS Altera, IPR-NIOS Datasheet - Page 136

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

5–4
Table 5–3. Altera IP Core Device Support Levels
Nios II/f Core
Nios II Processor Reference Handbook
Preliminary support—The core is verified with preliminary
timing models for this device family. The core meets all
functional requirements, but might still be undergoing
timing analysis for the device family. It can be used in
production designs with caution.
Final support—The core is verified with final timing models
for this device family. The core meets all functional and
timing requirements for the device family and can be used in
production designs.
FPGA Device Families
Table 5–2. Device Family Support (Part 2 of 2)
Table 5–3
The Nios II/f fast core is designed for high execution performance. Performance is
gained at the expense of core size. The base Nios II/f core, without the memory
management unit (MMU) or memory protection unit (MPU), is approximately 25%
larger than the Nios II/s core. Altera designed the Nios II/f core with the following
design goals in mind:
■
■
■
The resulting core is optimal for performance-critical applications, as well as for
applications with large amounts of code and/or data, such as systems running a
full-featured operating system.
Note to
(1) Device support levels are defined in
Maximize the instructions-per-cycle execution efficiency
Optimize interrupt latency
Maximize f
Table
defines the device support level nomenclature used by Altera IP cores.
Other device families
5–2:
HardCopy III/IV E
HardCopy IV GX
Device Family
Cyclone IV GX
HardCopy
Stratix IV GX
Stratix IV GT
MAX
Stratix II GX
Stratix IV E
Stratix III
Stratix II
Stratix V
performance of the processor core
®
II
Table
HardCopy Companion—The core is verifed with preliminary
timing models for the HardCopy companion device. The core
meets all functional requirements, but might still be
undergoing timing analysis for HardCopy device family. It
can be used in production designs with caution.
HardCopy Compilation—The core is verifed with final timing
models for the HardCopy device family. The core meets all
functional and timing requirements for the device family and
can be used in production designs.
5–3.
HardCopy Device Families
Chapter 5: Nios II Core Implementation Details
HardCopy Companion
HardCopy Companion
HardCopy Companion
Support
Preliminary
Preliminary
Preliminary
No support
December 2010 Altera Corporation
Final
Final
Final
Final
Final
(1)
Nios II/f Core