IPR-NIOS Altera, IPR-NIOS Datasheet - Page 188

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–2
Table 8–2. R-Type Instruction Format
Table 8–3. J-Type Instruction Format
Nios II Processor Reference Handbook
31
31
30
30
29
29
A
J-Type
28
28
27
27
26
26
■
■
In most cases, fields A and B specify the source operands, and field C specifies the
destination register.
Some R-Type instructions embed a small immediate value in the five low-order bits of
OPX. Unused bits in OPX are always 0.
R-type instructions include arithmetic and logical operations such as add and nor;
comparison operations such as cmpeq and cmplt; the custom instruction; and other
operations that need only register operands.
Table 8–2
J-type instructions contain:
■
■
J-type instructions, such as call and jmpi, transfer execution anywhere within a
256-MB range.
Table 8–3
25
25
Three 5-bit register fields A, B, and C
An 11-bit opcode-extension field OPX
A 6-bit opcode field
A 26-bit immediate data field
24
24
B
23
23
shows the R-type instruction format.
shows the J-type instruction format.
22
22
21
21
20
20
IMM26
19
19
C
18
18
17
17
16
16
15
15
14
14
13
13
12
12
OPX
11
11
10
10
9
9
8
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
7
6
6
5
5
4
4
3
3
OP
OP
Word Formats
2
2
1
1
0
0